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[g i}~y)6C 7V=9Kt>ԦTeѷx xw()3@e" Y;#4$T3Oj&^ao~7b'p"<~,o}ܔƽ.K=!*<"\FMi[WbBhh' XczFf  S80:=S9!T%I \.;.M'՗b4K%㿙dI((S YCQFH}x|>xC"Cꆧ'[wHRV5jl8Ёob&h]ºDOg%Phde ul*q-!6i(1|-QRPA~|%`*$'4wRjn8VxC=`$d\&xĈC?7722n6jnffi~t^ 51(~tfgKzID\sB].L?H-8_RRE̢p!W=5n\n3'++Q;~Rumm*O]u:OWo ϾҀ6[׾;#LWawZtL:#4 cّ&ze@f{[l~ZIkk1v$=T}ڄ1Ny@ׅQa2G"黸zື07LR.->WS/`%(g^8(::Ds񒜒06i^_ dQxx`[me/oNr!gJ<*E!]3 MwMazlT2tԴK+32dINNL HQXS^=p1 &<']EXp]*H.!̹"egZxitT33gɔB4!wYba [,N=O駉f?f:cU)[)!+7iNvjzDó6h,`P;r)$N.b֣-7 BK1Ǎíx `Y9lfK/ ܼhVQG)5=$;%G* `(+UT+V!֟؆ Ta6ݜ3fr, \ͽ̹2Q9 Ê~JEggXM1T|]xB1SB#l?8>/YdÀus _16TJn|R#c m܄dOZ'n(,(E Ѩ kR>'H! ˢ/!B!wq^}}ʓ'O^USS#vQ#@IG0rn_/M3xHe,gJKJEVPc#3x  qEEũ[pC`h_r5mx};BGx{gCA3OZyC: J,k)0);!dXDayyLړO>pzE`۰wn1Ǐ"ܭI‡$ĎJF#z 9fxO214, J= C=زy:;;/Hp+&R tlGbnwaɝc6 ^̍MRuuf4X g4X -`T !b,h-;~S^`/N v+$TU.Zx-O@HJKP1v,r(T_"c.S]&mp_Rh(q02&3@Ռлy|~WV®=Q۴}[eDY%|zZazFڅdXS;-(=X4*넼n[fn7 FׁfL,e7cҚ?3TNd(fnՅc͙0VBCX%b,6XޗQ1465vnڌֶYB KszI( CJFGV0f/J䠲=&a֬Y *m.Vc'>FZnERb3"4T % M  4(\UMTg4'Fcr,--p B4ƛgsh5E~yʺjd4$j頭(s?3`46ZO7ǐ4ȋnKldg,odMB&˃ NOsW6|Y:㕡3)ʲT2V~4kTGJ#.82jP!I!R|>ӦMEݮ]- /ں]aY E/*CV,sj/~ VyFfzUU ْ mTbkDh%`"K;ҙ ㅖkϧRQAObw]F%tA4=Mal 2% -8vO'~žsy T_׈NxsK^l= GLE&b6: K҈!{NCtHIt(t=$h4$fgwgW`?v;;K +/\ ') (܋] ÎGn dH0yx0 cE'9;'w`Kl30WitZd})3(Уanl?-ۏ@~{tI%ɨ(/CYE%*Rz 3+K8?()bw c \2/m4I$KVb3ŮhKeu=Q<ȴ,+ɓQNTT#O%C 1V/5-|躱Mcu8'ZS2]|R$e/K$TX]ɐsJ!O\0x$Cۏ= صw_ߎt)Դtvw$6ڊXx?r ك&5bF-,iclY3|X)$L[V PJX C;ck~WAui0aؑ!U8PƗx.ZPދ%-V-˶鶌B{ZHυ#2}~F}3&dvF$ur8 s"i8R6!+~Wm_+W&)(U"fTYREpU(P*@5*YZV'6 äzn2" $Y鱙 BǕQٕ:Jcy>q.vh$3IdUoIJ+JL\XI`u@?ceu޳9N+5]EQαwhr^x9=#9Gp}+tEXtCopyrightCopyright 2008-2011 INCORS GmbH!OIENDB``` k 1r ] b;(Number of passes: 4Lower Limit: Upper Limit: Reset limits to default Single: CPU # 0 Parallel (All CPUs) Round Robin (All CPUs)Sequential (All CPUs) View detailed RAM (SPD) info View memory usage Disable memory caching Disable ECC Polling Enable ECC Injection   x xd x8 x xQ@ x, x @ x  l   0 D X x U]Unable to open file for writing.Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config filePlease select an icon to continueUse the Left / Right arrow keys, or mouseMemory tests will automatically start in % 2ld.%01d secondsUse the Up / Down arrow keys to move between the testsPress <enter> or click to enable/disable the selected testNumber of passes: %3dAt least one test must be selectedCannot enable test. CPU does not support SSE instructionsNew Value: Number of passes must be greater than zeroSave system information summary to fileCPU TypeCPU ClockCPU Temperature%d (%d enabled for testing)# Logical ProcessorsL1 CacheL2 CacheL3 CacheTotal Physical MemoryMemory latencyMulti-bit ECC correctionECC scrubbingECC correctionECC detectionYesNoN/AUnknownEnabledDisabledECC EnabledUse the Up / Down arrow keys to select an optionThis option is available only in Pro versionECC is not enabled/supported by the systemECC injection is not supported by the systemThe System Info was saved to %sUse the Up / Down arrow keys to select a RAM modulePress <enter> or click to view the RAM details of the select moduleThe RAM SPD info could not be detectedPlease send the log file to help@passmark.comShowing modules %d - %d (%d modules total)Press PGUP/PGDN to go to the prev/next pageThe RAM info was saved to %sUse the Up / Down arrow keys to select a setting to changePress <enter> or click to change the selected settingMaximum system address: 0x%lxEnter an address or (Esc) to cancelEg. Hex or decimal address: 0x10000, 4096Eg. Suffixes (k,m,g): 5m (5 megabytes)Address must be less than the upper limitAddress must be greater than the lower limitAddress must be less than the maximum addressUse the Up / Down arrow keys to select a CPU selection modePress <enter> or click to set the CPU selection mode**Warning** Your UEFI firmware has limited multiprocessor supportList of CPUs available for testing: New CPU #: Invalid CPU numberMulti CPU modes are unavailable due to UEFI firmware limitationsUse the Up / Down arrow keys to select a parameter to changePress <enter> or click to change the selected parameterAvailable MemoryProgressPress any key to view the resultsUnable to create chart imageThe chart was saved to %sThe HTML report was saved to %sUse the Up / Down arrow keys to move between the resultsPress <enter> or click to include/exclude the result from the graphStep SizeBlock SizeReadWriteNo previous Advanced Memory test results were foundAt least one test result must be selectedA maximum of %d results can be selectedCould not open Benchmark directoryMemory allocation errorStep %d of %d: Step size %ld bytesStep %d of %d: Data Size %ld BitsUnknown errorTest CompleteTest StoppedMemory speed (MB/Sec. per Step Size)Memory speed (MB/Sec. per Block Size)Use the Up / Down arrow keys to change a settingPress <enter> or click to change the selected settingSelected language is not supported due to UEFI firmware limitationsExitConfigSystem (I)nfo(T)est Selection(A)ddress Range(C)PU Selection(S)tart Test(R)AM BenchmarkS(e)ttingsE(x)itLower Limit: [0x% 12lx]Upper Limit: [0x% 12lx]Reset limits to defaultSingle: CPU #%2dParallel (All CPUs)Round Robin (All CPUs)Sequential (All CPUs) View detailed RAM (SPD) info View memory usage Memory caching: %s ECC Polling: %s ECC Injection: %sSave detailed RAM SPD info to fileGo backBlock Read/Write: Test Mode: Access Data Width: StartView Prev. ResultsReadWriteMemory speed per access step sizeMemory speed per block size8-bit16-bit32-bit64-bit(N/A for current test mode)Save chart as BMPExport results as HTMLGraph selected result(s)Language: EnglishFranaisDeutsche,g-NV(!|SO)-NV(A~SO)Espaol (Latinoamrica)Test 0 [Address test, walking ones, 1 CPU]Test 1 [Address test, own address, 1 CPU]Test 2 [Address test, own address]Test 3 [Moving inversions, ones & zeroes]Test 4 [Moving inversions, 8-bit pattern]Test 5 [Moving inversions, random pattern]Test 6 [Block move, 64-byte blocks]Test 7 [Moving inversions, 32-bit pattern]Test 8 [Random number sequence]Test 9 [Modulo 20, ones & zeros]Test 10 [Bit fade test, 2 patterns, 1 CPU]Test 11 [Random number sequence, 64-bit]Test 12 [Random number sequence, 128-bit]Test 13 [Hammer test]Report DateGenerated byReport TypeRAM BenchmarkSummarySystem InformationMemory summaryNumber of RAM modulesEFI SpecificationsResult summaryTest Start TimeElapsed TimeMemory Range TestedCPU Selection Mode# Tests PassedLowest Error AddressHighest Error AddressBits in Error MaskBits in ErrorBits in Error - Total: %2d Min: %2d Max: %2d Avg: %2d Max Contiguous ErrorsLast %d ErrorsLast %d Warnings[ECC Error] Test: %d, Address: %lx, ECC Corrected: %s, Syndrome: %s, Channel/Slot: %s[ECC Error] Test: %d, (Col,Row,Rank,Bank): %s, ECC Corrected: %s, Syndrome: %s, Channel/Slot: %s[Data Error] Test: %d, CPU: %d, Address: %lx%s, Expected: %016lX, Actual: %016lX[Data Error] Test: %d, CPU: %d, Address: %lx%s, Expected: %08X, Actual: %08XWarningNote: Your RAM may be vulnerable to high frequency row hammer bit flips. However the conditions needed to induce these errors occur only very rarely in normal PC usage, and so this should not be of concern to most users.ECC ErrorsECC Correctable ErrorsECC Uncorrectable ErrorsErrorsTestResultPASSFAIL[CPU Error] Could not start CPU %dTest 10 - Sleeping (%ld seconds remaining)Test 13 [Hammer test] - Initializing patternTest 13 [Hammer test] - Hammering rowsTest 13 [Hammer test] - Verifying pattern[Note] RAM may be vulnerable to high frequency row hammer bit flips[ECC Inject] Injecting ECC error for %a[%s detected] Test: %d Addr: %lx[%s detected] Test: %d (Col,Row,Rank,Bank): %s[%s detected] Test: %d Channel/Slot: %sTest: %d Addr: %lx%s Expected: %016lX Actual: %016lX CPU: %dTest: %d Addr: %lx%s Expected: %08X Actual: %08X CPU: %d<Press any key for %s RAM info><Press any key for more %s RAM info>RAM TypeMaximum Clock Speed (MHz)Maximum Transfer Speed (MHz)Maximum Bandwidth (MB/s)Memory Capacity (MB)Jedec Manufacture NameSPD RevisionRegisteredECCDIMM Slot #ManufacturedWeek %d of Year %dYear %dModule Part #Module RevisionModule Serial #Module Manufacturing Location# of Row Addressing Bits# of Column Addressing Bits# of Banks# of RanksDevice Width in BitsBus Width in BitsModule Voltage<Press any key for timing information>CAS Latencies SupportedTimings @ Max Frequency (JEDEC)Minimum Clock Cycle Time, tCK (ns)Minimum CAS Latency Time, tAA (ns)Minimum RAS to CAS Delay, tRCD (ns)Minimum Row Precharge Time, tRP (ns)Minimum Active to Precharge Time, tRAS (ns)Minimum Row Active to Row Active Delay, tRRD (ns)Minimum Auto-Refresh to Active/Auto-Refresh Time, tRC (ns)Minimum Auto-Refresh to Active/Auto-Refresh Command Period, tRFC (ns)<Additional RAM SPD info available only in Pro><Press any key to return to Main Menu>Reserved MemoryLoader CodeLoader DataBoot Services CodeBoot Services DataRuntime Services CodeRuntime Services DataFree MemoryUnusable MemoryACPI TablesACPI Non-volatileOS Memory-mapped IOSystem Memory-mapped IOPAL Code<Press any key to continue>Clk/TempMemoryCPUStateRAM InfoPassPatternAddressTimeAddrModeCPUs FoundCPUs StartedCPUs Active(ESC)/(c)onfigurationSettings(1) Skip Current Test (2) End Test (3) Go Back to Main Menu(0) Continue L44fr-FRFrench Rcupration des informations sur le matriel. Veuillez patienter... Obtention des infos CPUID... Obtention de la taille du cache... Mesure de la vitesse CPU/cache/mmoire... Rcupration des donnes MSR du CPU... Mesure de la quantit de mmoire... Obtention des dtails du SPD... Obtention des dtails du contrleur mmoire... Test termin, appuyez sur n'importe quelle touche pour afficher le rsum <Enregistrer un rapport en HTML sur (%s) ? (oui(Y))>Impossible d'ouvrir le fichier en criture.Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config fileVeuillez slectionner une icne pour continuerUtilisez les touches flches gauche / droite, ou la sourisDmarrage automatique des tests mmoire dans % 2ld.%01d secondesUtilisez les touches flches haut / bas pour vous dplacer parmi les testsAppuyez sur Entre ou cliquez pour activer/dsactiver le test slectionnNombre de passes: %3dVous devez slectionner au moins un testImpossible d'activer ce test. Votre CPU ne gre pas les instructions SSE.Nouvelle valeur: Le nombre de passes doit tre suprieur zroSauvegarder le rsum des informations systmes dans un fichierType de CPUFrquence du CPUTemprature du CPU# Processeurs LogiquesCache L1Cache L2Cache L3Mmoire physique totaleLatence de la MmoireCorrection ECC multi-bitsEpuration ECCCorrection ECCDtection ECCOuiNonN/AInconnuActivDsactivECC ActivUtilisez les touches flches Haut / Bas pour slectionner une optionCette option est rserve la version ProL'ECC n'est pas activ ou pas support par votre systmeL'injection ECC n'est pas supporte par votre systmeLes informations systmes ont t sauvegardes dans %sUtilisez les touches flches Haut / Bas pour slectionner une barrette de RAMAppuyez sur Entre ou cliquez pour voir les dtails RAM de la barrette slectionneImpossible de dtecter les informations de la SPD de la RAMVeuillez envoyer le fichier de journal help@passmark.comAffichage de la barrette %d - %d (total de %d barrettes)Appuyez sur Pg.Prc/Pg.Suiv pour naviguer entre les pagesLes infos sur la RAM ont t enregistres dans %sUtilisez les touches flches Haut / Bas pour slectionner le paramtre modifierAppuyez sur Entre ou cliquez pour modifier le paramtre slectionneAdresse systme maximum: 0x%lxEntrez une adresse ou (Esc) pour annulerC--d Adresse en dcimal ou hexa: 0x10000, 4096C--d suffixes (k,m,g) : 5m (5 mga-octets)L'adresse doit tre moindre que la limite suprieureL'adresse doit tre au dessus de la limite infrieureL'adresse doit tre infrieure l'adresse maximaleUtilisez les touches flches Haut / Bas pour choisir un mode de slection CPUAppuyez sur Entre ou cliquez pour modifier le mode de slection CPU**Attention** Le support du multiprocesseur par votre firmware UEFI est limitListe des CPU disponibles pour les tests: Nouveau CPU #: Numro de CPU invalideModes Multi-CPU indisponibles du fait des limitations du firmware UEFIUtilisez les touches flches Haut / Bas pour slectionner un paramtre modifierAppuyez sur Entre ou cliquez pour modifier le paramtre slectionnMmoire disponibleAvancementAppuyez sur n'importe quelle touche pour voir les rsultatsImpossible de crer le graphiqueLe graphique a t sauvegard dans %sLe rapport HTML a t sauvegard dans %sUtilisez les touches flches Haut / Bas pour naviguer parmi les rsultatsAppuyez sur Entre ou cliquez pour inclure/exclure le rsultat du graphiqueTaille du sautTaille du blocLectureEcritureAucun rsultat de test mmoire avanc trouvVous devez slectionner au moins un rsultat de testVous ne pouvez pas slectionner plus de %d rsultatsImpossible d'ouvrir le rpertoire BenchmarkErreur d'allocation mmoireEtape %d de %d: Sauts de %ld octetsEtape %d de %d: Donnes de %ld octetsErreur inconnueTest terminTest interrompuVitesse mmoire (Mo/Sec. par taille de saut)Vitesse mmoire (Mo/Sec. par taille de bloc)Utilisez les touches flches Haut / Bas pour modifier un paramtreAppuyez sur Entre ou cliquez pour modifier le paramtre slectionn!QuitterConfig(I)nfo SystmeSlection (T)estPlage (A)dressesSlection (C)PUDmarrer Te(s)tBenchmark (R)AMParamtr(e)sQuitter(X)Limite infrieure: [0x% 12lx]Limite suprieure: [0x% 12lx]Rinitialiser limites aux valeurs d'usineSolo: CPU #%2dParallle (Tous les CPU)Round-Robin (Tous les CPU)Squentiel (Tous les CPU) Voir les infos dtailles de la RAM (SPD) Voir la consommation mmoire Cache mmoire: %s Sondage ECC: %s Injection ECC: %sEnregistrer infos SPD RAM dtailles dans un fichierRetourLecture/Ecriture Bloc: Mode de test: Largeur accs aux donnes: DmarrerVoir rsultats prc.LectureEcritureVitesse mmoire par taille de sautVitesse mmoire par taille de bloc8-bit16-bit32-bit64-bit(N/A pour ce mode de test)Enregistrer graphique en BMPExporter rsultats en HTMLGraphique des rsultats slectionsLangue: !Test 0 [Test d'adresse, walking ones, 1 CPU]Test 1 [Test d'adresse, own address, 1 CPU]Test 2 [Test d'adresse, own address]Test 3 [Moving inversions, uns et zros]Test 4 [Moving inversions, pattern 8-bits]Test 5 [Moving inversions, pattern alatoire]Test 6 [Dplacement de bloc, blocs de 64 octets]Test 7 [Moving inversions, pattern 32-bits]Test 8 [Squence de chiffres alatoires]Test 9 [Modulo 20, uns et zros]Test 10 [Test bit fade, 2 patterns, 1 CPU]Test 11 [Squence de chiffres alatoire, 64 bits]Test 12 [Squence de chiffres alatoires, 128 bits]Test 13 [Hammer test]Date du rapportGnr parType de rapportBenchmark RAMRsumInformations systmeRsum sur la mmoireNombre de barrettes de RAMSpcifications EFIRsum du rsultatHeure de dbut du testTemps coulPlage mmoire testeMode de slection CPU# tests passsPlus petite adresse avec erreurPlus grande adresse avec erreurMasque des bits erronsBits erronsBits errons - Total: %2d Min: %2d Max: %2d Moy: %2d Erreurs contigues max%d dernires erreurs%d dernires attentions[Erreur ECC] Test: %d, Adresse: %lx, Correction ECC: %s, Syndrome: %s, Canal/Emplacement: %s[Erreur ECC] Test: %d, (Col,Rang,Rank,Banque): %s, Correction ECC: %s, Syndrome: %s, Canal/Emplacement: %s[Erreur de donne] Test: %d, CPU: %d, Adresse: %lx%s, Attendu: %0161X, Obtenu: %0161X[Erreur de donne] Test: %d, CPU: %d, Adresse: %lx%s, Attendu: %08X, Obtenu: %08XAttentionNote: Your RAM may be vulnerable to high frequency row hammer bit flips. However the conditions needed to induce these errors occur only very rarely in normal PC usage, and so this should not be of concern to most users.Erreur ECCErreurs corrigeables par ECCErreurs non-corrigeables par ECCErreursTestRsultatVALIDECHOU[Erreur CPU] Impossible de dmarrer le CPU %dTest 10 - Veille (%ld secondes restantes)Test 13 [Hammer test] Initialisation du patternTest 13 [Hammer test] - Hammering des rangesTest 13 [Hammer test] - Vrification du pattern[Note] RAM may be vulnerable to high frequency row hammer bit flips[Injection ECC] Injection d'erreur ECC pour %a[%s dtect] Test: %d Adr.: %lx[%s dtect] Test: %d (Col,Rang,Rank,Banque): %s[%s dtect] Test: %d Canal/Emplacement: %sTest: %d Adr.: %lx%s Attendu: %0161X Obtenu: %0161X CPU: %dTest: %d Adr.: %lx%s Attendu: %08X Obtenu: %08X CPU: %d<Appuyez sur une touche pour des infos sur RAM %s>Appuyez sur une touche pour + d'infos sur RAM %s>Type de RAMVitesse d'horloge maximale (MHz)Vitesse de transfert maximale (MHz)Bande-passante maximale (Mo/s)Capacit (Mo)Nom Jedec du fabricantRvision du SPDRegisteredECCEmplacement DIMM #Fabriqu leSemaine %d de l'anne %dAnne %dNumro de pice, barrette #Rvision de la barretteSerial de la barrette #Lieu de fabrication de la barretteNb. de bits d'adressage de rangesNb. de bits d'adressage de colonesNb. de banquesNb. de ranksLargeur matrielle (en bits)Largeur de bus (en bits)Voltage de la barrette<Appuyez sur une touche pour les informations de timing>Latences CAS supportesTimings et Frquences max (JEDEC)Dure minimum de cycle d'horloge, tCK (ns)Latence CAS minimum, tAA (ns)Dlai minimum RAS to CAS, tRCD (ns)Dure minimum Row Precharge, tRP (ns)Temps minimum Active to Precharge, tRAS (ns)Dlai minimum Row Active to Row Active, tRRD (ns)Temps minimum Auto-Refresh to Active/Auto-Refresh, tRC (ns)Temps minimum Auto-Refresh to Active/Auto-refresh Command, tRFC (ns)<Infos SPD RAM supplmentaires rserves la version Pro><Appuyez sur une touche pour retourner au Menu Principal>Mmoire rserveCode du loaderDonnes du loaderCode des services de dmarrageDonnes des services de dmarrageCode des services d'excutionDonnes des services d'excutionMmoire disponibleMmoire inutilisableTables ACPIACPI non-volatilE/S de l'OS mappes en mmoireE/S systmes mappes en mmoireCode PAL<Appuyez sur une touche pour continuer>Horl./TempMmoireCPUEtatInfos RAMPassePatternAdresseDureAdr.ModeCPUs trouvsCPUs dmarrsCPUs actifs(ESC)/(c)onfigurationParamtres(1) Passer le test en cours (2) Abandonner le test (3) Retour au menu principal(0) Continuer L44es-ARSpanish Recuperando informacin del hardware. Por favor espere& Obteniendo informacin del CPUID ... Obteniendo tamao del cache... Midiendo velocidad CPU/cache/memoria... Obteniendo datos del CPU MSR ... Obteniendo tamao de la memoria... Obteniendo detalles del SPD... Obteniendo detalles de la memoria del controlador... Testeo completo, presione cualquier tecla para mostrar sumario <Grabar un reporte HTML a (%s)? (si(Y))>No se puede abrir el archivo para escribirlo.Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config filePor favor selecione un icono para continuarUse la tecla flecha izquierda / derecha, o el mouseEl testeo de memoria comenzar automaticamente en % 2ld.%01d segundosUse la tecla flecha Arriba / Abajo para mover los diferentes testeosPresione <enter> o haga click en habilitar/desabilitar el testeo seleccionadoNumero de pasadas: %3dPor lo menos un testeo tiene que ser seleccionadoNo se puede habilitar el testeo. El CPU seleccionado no soporta las instrucciones SSENuevo valor: El numero de pasadas tiene que ser mayor a ceroGuardar informacin del sistema en el archivoTipo de CPUReloj del CPUTemperatura del CPU%d (%d habilitado para el testeo)# Procesador LogicoCache L1Cache L2Cache L3Memoria Total FisicaLatencia de la MemoriaCorreccin Multi-bit ECCECC scrubbingCorrecin ECCDeteccon ECCSiNoN/DDesconocidoHabilitadoDesabilitadoECC HabilitadoUse la tecla flecha Arriba / Abajo para seleccion opcinEsta opcion esta disponible en la version Pro unicamenteECC esta no habilitado/soportado por el sistemaInjeccin ECC no esta soportada por el sistemaEl Sistema de Informacion fue guardado en %sUse la tecla flecha Arriba / Abajo para selecionar el modulo RAMPresione <enter> o click para ver el detalle de la RAM del modulo seleccionadoLa informacion de la RAM SPD no pudo ser detectadaPor favor envie el archivo de logeo a help@passmark.comMostrando modulos %d - %d (%d modules total)Presione REPAG/AVPAG para ir a la pagina anterior / posteriorLa informacin de la RAM fue guardada en %sUse la tecla flecha Arriba / Abajo para selecionar el cambio de la configuracinPresione <enter> o haga click para cambiar la configuracin seleccionadaDirecciones maximas del sistema: 0x%lxEntre una direccin o (Esc) para cancelarEj. Direccin hexadecimal o decimal: 0x10000, 4096Ej. sufijos (k,m,g): 5m (5 megabytes)Direcciones deben ser mejor que el limite superiorDirecciones deben ser superiores que el limite mas bajoLa direccin debe ser menos que la direccin maximaUse la tecla flecha Arriba / Abajo para seleccionar el modo del CPUPresione <enter> o haga click para selecionar el modo del CPU y dejarlo configurado**Precaucin** Tu UEFI firmware tiene un limite de multiprocesadorLista de CPUs disponibles para testeo: CPU nuevo #: Numero invalido del CPUEl CPU multi modo no esta disponible debido a la limitacin del firmware UEFIUse la tecla flecha Arriba / Abajo para seleccionar el parametro a cambiarPresione <enter> o haga click para cambiar el parametro selecionadoMemoria disponibleProgresoPresione cualquier tecla para ver los resultadosIncapaz de crear una tabla con la imagenLa tabla fue guardada en %sEl reporte HTML fue guardado en %sUse la tecla flecha Arriba / Abajo para moverse entre los resultadosPresione <enter> o hace click para incluir / excluir el resultado del graficoTamao del pasoTamao del bloqueLeeEscribeNo hay testeo previo de la memoria avanzada en los resultadosAl menos uno de los resultados debe ser seleccionadoUn maximo de %d resulta que puede ser seleccionadoNo se pudo abrir el directorio de BenchmarkError de asignacin de memoriaEl paso %d de %d: Tamao del paso %ld en bytesEl paso %d de %d: Tamao del dato %ld en BitsError desconocidoTest CompletoTest DetenidoVelocidad de la RAM (MB/Sec. por tamao del paso)Velocidad de la RAM (MB/Sec. por bloque de tamao)Use la tecla flecha Arriba / Abajo para cambiar configuracinPresione <enter> o haga clic para cambiar la configuracin seleccion!SalidaConfiguracin(I)nfo del sistemaSeleccin de (T)esteoDireccin de R(a)ngoSeleccin de (C)PU Comenzar Te(s)teo(R)AM BenchmarkConfiguracion(e)sSalida(X)Lmite ms bajo: [0x% 12lx]Lmite ms alto: [0x% 12lx]Reiniciar por defectoSimple: CPU #%2dParalelo (Todos los CPUs)Round Robin (Todos los CPUs)Secuencial (Todos los CPUs) Visualizacin detallada RAM (SPD) informacin Visualizacin de memoria en uso Memory caching: %s ECC Polling: %s Injeccin de ECC : %sGuardar informacin detallada de la RAM SPD en un archivoIr atrsBloque de lee/escribe: Modo de testeo: Acceso al ancho de datos: ComienzoVisualizacin previa de los resultadosLeeEscribeVelocidad RAM / tamao del pasoVelocidad RAM / tamao del bloque8-bit16-bit32-bit64-bit(N/D para este modo de testeo)Guardar tabla como BMPExportar resultados como HTMLGenerando grficos de los resultadosLenguaje: !Testeo 0 [Direccin del testeo, walking ones, 1 CPU]Testeo 1 [Direccin del testeo, own address, 1 CPU]Testeo 2 [Direccin del testeo, own address]Testeo 3 [Moviendo inversiones de unos y ceros]Testeo 4 [Moviendo inversiones, 8-bit patrn]Testeo 5 [Moviendo inversiones, random patrn]Testeo 6 [Block move, 64-byte blocks]Testeo 7 [Moviendo inversiones, 32-bit patrn]Testeo 8 [Secuencia de nmeros al azar]Testeo 9 [Modulo 20, unos y ceros]Testeo 10 [Bit fade test, 2 patterns, 1 CPU]Testeo 11 [Secuencia de nmero al azar, 64-bit]Testeo 12 [Secuencia de nmero al azar, 128-bit]Testeo 13 [Hammer test]Reporte de fechaGenerado porTipo de reporteRAM BenchmarkSumarioInformacin del sistemaSumario de la memoriaNmero del mdulo RAMEFI EspecificacionesResultado del sumarioTiempo del comienzo del testeoTiempo transcurridoRango de memoria testeadaSeleccin del modo del CPU# Testeo pasadoEl error mas bajo de la direccinEl error mas alto de la direccinErrores en la mascara de bitsErrores en los BitsBits en Error - Total: %2d Min: %2d Max: %2d Avg: %2d Errores mximo continuosErrores %d ltimosPrecaucins %d ltimos[Error ECC] Testeo: %d, Direccin: %lx, ECC Corregido: %s, Sindrome: %s, Canal/Ranura: %s[Error ECC] Testeo: %d, (Col,Row,Rank,Bank): %s, ECC Corregido: %s, Sindrome: %s, Canal/Ranura: %s[Error del Dato] Testeo: %d, CPU: %d, Direccin: %lx%s, Esperado: %016lX, Actual: %016lX[Error del Dato] Testeo: %d, CPU: %d, Direccin: %lx%s, Esperado: %08X, Actual: %08XPrecaucinNote: Your RAM may be vulnerable to high frequency row hammer bit flips. However the conditions needed to induce these errors occur only very rarely in normal PC usage, and so this should not be of concern to most users.Errores de ECCErrores corregibles ECCErrores incorregibles ECCErroresTesteoResultadoPASOFALLO[CPU Error] No pudo comenzar CPU %dTesteo 10 - Durmiendo (%ld segundos restantes)Testeo 13 [Testeo martillo] - Inicializando patronesTest 13 [Testeo martillo] - Martillando filasTest 13 [Testeo martillo] - Verificando patrones[Note] RAM may be vulnerable to high frequency row hammer bit flips[ECC Injectado] Injectando error ECC en %a[%s detectado] Testeo: %d Direccin: %lx[%s detectado] Testeo: %d (Columna,Filas,Rango,Banco): %s[%s detectado] Testeo: %d Canal/Ranura: %sTesteo: %d Direccin: %lx%s Esperado: %016lX Actual: %016lX CPU: %dTesteo: %d Direccin: %lx%s Esperado: %08X Actual: %08X CPU: %d<Presione cualquier tecla para la informacin %s RAM><Presione cualquier tecla mas informacin %s RAM >Tipo de RAMVelocidad mxima de reloj (MHz)Velocidad mxima de transferencia (MHz)Ancho de banda mximo(MB/s)Capacidad de memoria (MB)Nombre de fabricacin JedecRevisin SPDRegistradoECCRanura DIMM #FabricadoSemana %d del ao %dAo %dModulo Parte #Modulo RevisionModulo Serie #Localizacion del modulo fabricado# of Fila Dirigindose Bits# of Columna Dirigindose Bits# of Bancos# of RangosAncho del dispositivo en BitsAncho del Bus en BitsModulo Voltage<Presione cualquier tecla para informacin del tiempo>CAS Latencias SoportadasTiempos a maxima frecuencia (JEDEC)Mnimo tiempo de ciclo de reloj, tCK (ns)Mnimo tiempo de Latencia CAS, tAA (ns)Mnimo RAS a CAS de demora, tRCD (ns)Mnima fila de tiempo de precarga, tRP (ns)Mnimo de tiempo Activo para Precargar, tRAS (ns)Fila mnima activa a fila activa de Retraso, tRRD (ns)Auto refresco minimo a tiempo de Auto refresco activo, tRC (ns)Auto refresco minimo a Autorefresco activo periodo de comando, tRFC (ns)<Informacin disponible de memoria RAM solamente en versin Pro RAM SPD ><Presione cualquier tecla para regresar al men principal>Memoria reservadaCargador de datosCargador de datosCodigos de servicio de arranqueArranque de datos de serviciosServicios Tiempo de ejecucin CdigoTiempo de ejecucin de servicios de datosMemoria LibreMemoria inusableACPI TablasACPI No volatilOS Memoria asignada IOSistema de memoria asignada IOCodigo PAL<Presione cualquier tecla para continuar>Reloj/TempMemoriaCPUEstadoInfo RAMPasoPatrnDireccinTiempoAddrModeCPUs encontradoCPUs comenzadoCPUs activo(ESC)/(c)onfiguracionConfiguraciones(1) Saltar testeo actual (2) Fin del Testeo (3) Volver atras al men principal(0) Continuar rG44de-DEGerman Erfasse Hardware-Infos. Bitte warten... Lese CPUID-Info... Lese Cache-Gre... Messe CPU/cache/mem Geschwindigkeiten... Erfasse CPU MSR Daten... Lese Speichergre... Lese SPD Details... Lese Speicher-Controller Details...Test vollstndig, beliebige Taste drcken fr Zusammenfassung <Einen HTML-Bericht auf (%s) speichern? (ja(Y))>Datei kann nicht zum Schreiben geffnet werden.Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config fileZum Fortfahren bitte ein Icon auswhlenPfeil links/rechts Tasten oder Maus verwendenSpeichertest wird automatisch in % 2ld.%01d Sekunden startenPfeil hoch/runter Tasten verwenden, um zwischen den Tests zu wechseln<enter> drcken oder klicken, um den gewhlten Test zu aktivieren/deaktivierenAnzahl der Durchgnge: %3dEs muss mindestens ein Test ausgewhlt werdenKann Test nicht aktivieren, CPU untersttzt SSE Anweisungen nichtNeuer Wert: Anzahl der Durchgnge muss grer als Null seinSpeichere Zusammenfassung der Systeminformationen in DateiCPU TypCPU FrequenzCPU Temperatur%d (%d fr Test aktiviert)# Logische ProzessorenL1 CacheL2 CacheL3 CachePhysikalischer SpeicherSpeicherlatenzMulti-bit ECC KorrekturECC ScrubbingECC KorrekturECC ErkennungJaNeinn.v.UnbekanntAktiviertDeaktiviertECC aktiviertPfeil hoch/runter Tasten verwenden, um eine Option zu whlenDiese Option ist nur in der Pro-Version verfgbarECC auf dem System nicht aktiviert/untersttztECC Injektion wird nicht vom System untersttztDie Systeminformationen wurde gespeichert nach %sPfeil hoch/runter Tasten verwenden, um ein RAM-Modul auszuwhlen<enter> drcken oder klicken, um die RAM-Details des gewhlten Moduls zu sehenDie RAM SPD Info konnten nicht erkannt werdenBitte die Logdatei an help@passmark.com sendenZeige Module %d - %d (%d Module gesamt)Drcke Bild hoch/runter, um zur vorherigen/nchsten Seite zu gelangenDie RAM-Infos wurden gespeichert nach %sPfeil hoch/runter Tasten verwenden, um zu ndernde Einstellung auszuwhlen<enter> drcken oder klicken, um ausgewhlte Einstellung zu ndernMaximale System-Adresse: 0x%lxAdresse eingeben oder (Esc) zum AbbruchZ.B. Hex- oder Dezimaladresse: 0x10000, 4096Z.B. Suffixe (k,m,g): 5m (5 Megabyte)Adresse muss kleiner als das obere Limit seinAdresse muss grer als das untere Limit seinAdresse muss kleiner als die maximale Adresse seinPfeil hoch/runter Tasten verwenden, um einen CPU Auswahlmodus auszuwhlen<enter> drcken oder klicken, um CPU Auswahlmodus einzustellen**Warnung** Ihre UEFI Firmware untersttzt Multiprozessoren nur begrenztListe der fr Tests verfgbaren CPUs: Neue CPU #:Ungltige CPU NummerMulti-CPU-Modi sind aufgrund eingeschrnkter UEFI-Firmware nicht verfgbarPfeil hoch/runter Tasten verwenden, um einen zu ndernden Parameter auszuwhlen<enter> drcken oder klicken, um den gewhlten Parameter zu ndernVerfgbarer SpeicherFortschrittBeliebige Taste drcken, um Ergebnisse anzuzeigenChart-Bild erstellen nicht mglichDer Chart wurde gespeichert nach %sDer HTML-Bericht wurde gespeichert nach %sPfeil hoch/runter Tasten verwenden, um zwischen den Ergebnissen zu wechseln<enter> drcken oder klicken, um Ergebnis beim Graph ein-/auszuschlieenSchrittgreBlockgreLesenSchreibenEs wurden keine vorherigen Ergebnisse eines Fortgeschrittenen Speichertests gefundenMindestens ein Testergebnis muss ausgewhlt werdenEs knnen maximal %d Ergebnisse ausgewhlt werdenKonnte Benchmark-Verzeichnis nicht ffnenSpeicherzuweisungsfehlerSchritt %d von %d: Schrittgre %ld BytesSchritt %d von %d: Datengre %ld BitsUnbekannter FehlerTest vollstndigTest gestopptSpeichergeschwindigkeit (MB/s pro Schrittgre)Speichergeschwindigkeit (MB/s pro Blockgre)Pfeil hoch/runter Tasten verwenden, um eine Einstellung zu ndern<enter> drcken oder klicken, um die ausgewhlte Einstellung zu ndern!VerlassenKonfigurierenSystem (I)nfo(T)estauswahl(A)dressbereich(C)PU Auswahl(S)tarte Test(R)AM Benchmark(E)instellungenE(x)itUnteres Limit: [0x% 12lx]Oberes Limit : [0x% 12lx]Limits auf Vorgabe zurcksetzenEinzel: CPU #%2dParallel (Alle CPUs)Round Robin (Alle CPUs)Sequentiell (All CPUs) Zeige detaillierte RAM (SPD) Info Zeige Speichernutzung Speicher-Caching: %s ECC Polling: %s ECC Injektion: %sSpeichere detaillierte RAM SPD Info in DateiGehe zurckBlock Lesen/Schreiben: Testmodus: Zugriff Datenbreite: StartSiehe vorh. ErgebnisseLesenSchreibenSpeichergeschwindigkeit (Schrittgre)Speichergeschwindigkeit (Blockgre)8-bit16-bit32-bit64-bit(n.v. fr aktuellen Testmodus)Speichere Chart als BMPExportiere Ergebnisse als HTMLGraph ausgewhlte(s) Ergebnis(se)Sprache: !Test 0 [Adressen Test, fortschreitende Einsen, 1 CPU]Test 1 [Adressen Test, eigene Adresse, 1 CPU]Test 2 [Adressen Test, eigene Adresse]Test 3 [Bewegte Inversionen, Einsen & Nullen]Test 4 [Bewegte Inversionen, 8-bit Muster]Test 5 [Bewegte Inversionen, Zufallsmuster]Test 6 [Blockbewegung, 64-byte Blcke]Test 7 [Bewegte Inversionen, 32-bit Muster]Test 8 [Zufallszahlensequenz]Test 9 [Modulo 20, Einsen & Nullen]Test 10 [Test auf verblassende Bits, 2 Muster, 1 CPU]Test 11 [Zufallszahlensequenz, 64-bit]Test 12 [Zufallszahlensequenz, 128-bit]Test 13 [Hammer test]Bericht DatumGeneriert vonBericht TypRAM BenchmarkZusammenfassungSystem InformationSpeicher ZusammenfassungAnzahl der RAM ModuleEFI SpezifikationenErgebnis ZusammenfassungTest StartzeitLaufzeitGetesteter SpeicherbereichCPU AuswahlmodusBestandene TestsNiedrigste FehleradresseHchste FehleradresseBits in FehlermaskeBits in FehlerBits in Fehler - Gesamt: %2d Min: %2d Max: %2d Durchschn.: %2d Max zusammenhngende FehlerLetzte %d FehlerLetzte %d Warnung[ECC Fehler] Test: %d, Adresse: %lx, ECC Korrigiert: %s, Syndrom: %s, Channel/Slot: %s[ECC Fehler] Test: %d, (Col,Row,Rank,Bank): %s, ECC Korrigiert: %s, Syndrom: %s, Channel/Slot: %s[Datenfehler] Test: %d, CPU: %d, Adresse: %lx%s, Erwartet: %016lX, Tatschlich: %016lX[Datenfehler] Test: %d, CPU: %d, Adresse: %lx%s, Erwartet: %08X, Tatschlich: %08XWarnungNote: Your RAM may be vulnerable to high frequency row hammer bit flips. However the conditions needed to induce these errors occur only very rarely in normal PC usage, and so this should not be of concern to most users.ECC FehlerECC korrigierbare FehlerECC nicht korrigierbare FehlerFehlerTestErgebnisBESTANDENDURCHGEFALLEN[CPU Fehler] Konnte CPU %d nicht startenTest 10 - Schlft (%ld verbleibende Sekunden)Test 13 [Hammer Test] - Initialisiere MusterTest 13 [Hammer Test] - Hmmere ReihenTest 13 [Hammer Test] - Verifiziere Muster[Note] RAM may be vulnerable to high frequency row hammer bit flips[ECC Inject] Injiziere ECC Fehler fr %a[%s erkannt] Test: %d Adr: %lx[%s erkannt] Test: %d (Col,Row,Rank,Bank): %s[%s erkannt] Test: %d Channel/Slot: %sTest: %d Adr: %lx%s Erwartet: %016lX Tatschlich: %016lX CPU: %dTest: %d Adr: %lx%s Erwartet: %08X Tatschlich: %08X CPU: %d<Beliebige Taste drcken fr %s RAM Info><Beliebige Taste drcken fr weitere %s RAM Info>RAM TypMaximale Taktfrequenz (MHz)Maximale Transfergeschwindigkeit (MHz)Maximale Bandbreite (MB/s)Speicherkapazitt (MB)Jedec HerstellernameSPD RevisionRegistriertECCDIMM Slot #HergestelltWoche %d von Jahr %dJahr %dModulteil #Modul RevisionModul Seriennr.Modul HerstellungsortReihenanzahl Adress-BitsSpaltenzahl Adress-BitsAnzahl BanksAnzahl RanksEinheitbreite in BitsBusbreite in BitsModulspannung<Beliebige Taste drcken fr Timing-Information>CAS Latenzen untersttztTimings @ max. Frequenz (JEDEC)Minimale Clock Cycle Zeit, tCK (ns)Minimale CAS Latenz Zeit, tAA (ns)Minimale RAS zu CAS Verzgerung, tRCD (ns)Minimale Spalten Vorladezeit, tRP (ns)Minimale Aktiv bis Vorladezeit, tRAS (ns)Minimale Reihe aktiv bis Reihe aktiv Verzgerung, tRRD (ns)Minimale Auto-Refresh bis Aktiv/Auto-Refresh Zeit, tRC (ns)Minimale Auto-Refresh bis Aktiv/Auto-Refresh Kommandodauer, tRFC (ns)<Beliebige Taste drcken, um zum Hauptmen zurckzukehrenReservierter SpeicherLader CodeLader DatenBoot Services CodeBoot Services DataRuntime Services CodeRuntime Services DataFreier SpeicherNicht nutzbarer SpeicherACPI TabellenACPI nicht flchtigOS Memory-mapped IOSystem Memory-mapped IOPAL Code<Beliebige Taste drcken zum Fortsetzen>Clk/TempSpeicherCPUStatusRAM InfoDurchlaufMusterAdresseZeitAdrModusCPUs gefundenCPUs gestartetCPUs aktiv(ESC)/Konfiguration(c)Einstellungen(1) Aktuellen Test berspringen(2) Test beenden (3) Zurck zum Hauptmen (0) Fortfahren +44ja-JPJapaneseA0 B0 C0 D0 E0 F0 0 0 0 0 0 0 xN yN zN {N |N 000000`1X00QW0f0D0~0Y00\0J0_a0O0`0U0D00 CPUID`1X0S_W0f0D0~0Y0 000000000S_W0f0D0~0Y0 CPU/00000/000n0^0,nW0f0D0~0Y0 CPU MSR00000QW0f0D0~0Y0 0000n00000S_W0f0D0~0Y0 SPDn0s0}0S_W0f0D0~0Y0 00000000000n0s0}0S_W0f0D0~0Y0 000L0[NW0~0W0_00i00K0000bY0h000000h:yW0~0Y00 (%s)k0HTML00000OX[W0~0Y0K0(o0D0(y))fM00_00n000000O0S0h0L0g0M0~0[00g0W0_0Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config file}Q00k0o000000xbW0f0O0`0U0D0]Sn0wpS00K00000Oc0f0O0`0U0D0% 2ld.%01dy_k0Rvk000000000YW0~0Y0T0000yRY00k0o0 N N0n0wpS000Oc0f0O0`0U0D0Enter000bY0K00000W0f0xbW0_00000 gR/!qRk0W0f0O0`0U0D0000Vpe: %3d\j0O0h00d00000x0g0O0`0U0D00000 gRk0g0M0~0[000CPUL0SSE00000000000000W0f0D0~0[000eW0D0$P: 000Vpeo00000'YM0D0peg0j0Q00p0j00~0[000000`1Xn0000000000k0OX[Y00CPU000CPU0000CPU)n^%d (%dd0L0000k0 gRg0Y0)# ֊t00000L1 wlo|mL2 wlo|mL3 wlo|mTirt00000000000000000ECCckECC000000ECCckECCiQo0D0D0D0H0rS_W0j0D0 Nf gR!qRECCo0 gR N Nn0wpS000Oc0f0000000xbW0f0O0`0U0D0S0n000000o00000000g0n00)R(uSg0Y0J0OD0n00000o0ECC0 gRS/0000W0f0D0~0[00J0OD0n00000o0ECC0000000000000W0f0D0~0[000000`1X0%sk0OX[W0~0W0_0 N Nn0wpS000Oc0f0RAM000000xbW0f0O0`0U0D0Enter000bY0K00000Y00h0xbW0_000000n0RAMn0s0}000S0h0L0g0M0~0Y0RAM SPD`1Xo0iQg0M0~0[00g0W0_00000000help@passmark.comk0c0f0O0`0U0D0000000h:yW0f0D0~0Y0 %d - %d (T00000: %d)PGUP/PGDN0bW0f0MR/!kn0000k0yRW0~0Y0RAM`1X0%sk0OX[W0~0W0_0 N Nn0wpS000Oc0f0 YfW0_0D0-[0xbW0f0O0`0U0D0Enter000bY0K00000W0f0-[0 YfW0f0O0`0U0D00000n0g'Y0000: 0x%lx00000eQRY00K0(Esc)00g000000O0Hex~0_0o0102l0000: 0x10000, 4096O00000000(k,m,g): 5m (500000)0000o0 NP$PN Ng0j0Q00p0j00~0[000000o0 NP$PN Ng0j0Q00p0j00~0[000000o0g'Y0000N Ng0j0Q00p0j00~0[00 N Nn0wpS000Oc0f0CPUxb0000x0g0O0`0U0D0Enter000bY0K00000W0f0CPUxb0000-[W0f0O0`0U0D0**fJT** J0OD0n0UEFI0000000o0000000000NW0K00000W0f0D0~0[00CPUn0000L0)R(uSg0Y0: eW0D0CPU #: !qRj0CPUjuSUEFI0000000n06RPk0000000CPU000o0)R(ug0M0~0[00 N Nn0wpS000Oc0f0 YfW0_0D0000000xbW0f0O0`0U0D0Enter000bY0K00000W0f0xbW0_0000000 YfW0f0O0`0U0D0)R(uSj00002LrlP}g00k0o0i00K0000bW0f0O0`0U0D0000000000\Obg0M0~0[0000000%sk0OX[W0~0W0_0HTML00000%sk0OX[W0~0W0_0 N Nn0wpS000Oc0f0TP}g0yRW0~0Y0Enter000bY0K00000W0f0P}g0000k0+T0/+T~0j0D0K0xbW0f0O0`0U0D00000000000000000fM00NMRk0Lc0_0s0}000n0P}go0d0K00~0[00g0W0_0\j0O0h00d0000P}g0xbW0f0O0`0U0D0g'Y%dd0P}g0xbg0M0~0Y00000000000000Q0~0[00g0W0_000000000000000000 %d / %d: 0000000 %ld 0000000 %d / %d: 000000 %ld 000 Nfj0000000[N000-Nbk000^0(MB/y 0000000T0h0)000^0(MB/y 0 0000000T0h0) N Nn0wpS000Oc0f0-[0 YfW0f0O0`0U0D0Enter000bY0K00000W0f0xbW0_0-[0 YfW0f0O0`0U0D0!B}N-[|}`1X(I)}xb(T)q}{V(A)(C)PUxb}Y(S)(R)AMpx-[(E)B}N(X) NP$P: [0x% 12lx] NP$P: [0x% 12lx]PLu$P0Rg$Pk0;bY00000: CPU #%2d0000hQf0n0CPU 0000000hQf0n0CPU 0000000hQf0n0CPU  s0}j0RAM(SPD)`1X00 0000O(url00 000000000: %s ECC00000: %s ECC00000000: %ss0}RAM SPD`1X00000k0OX[Y00;b000000/f0: 000000: 0000000E^: YNMRn0P}g000f000000000000T0h0n0000^0000000T0h0n0000^8000160003200064000(s(Wn0000000g0o0)R(u NS)00000BMPg0OX[P}g0HTMLb__g0000000xbW0_0P}gn0000: !000 0 [q}}0supwx01 CPU]000 1 [q}}0ꁫn0q}01 CPU]000 2 [q}}0ꁫn0q}]000 3 [pxrp|n01 & 0]000 4 [pxrp|n, 8op]000 5 [pxrp|n, p]000 6 [burnBX ig064rox]000 7 [pxrp|n032op]000 8 [qNpeR0000k0f0ig]000 9 [Modulo-20, 1 & 0]000 10 [ojpig02p01 CPU]000 11 [qNpeR0000k0f0ig064o]000 12 [qNpeR0000k0f0ig0128o]000 13 [pig]0000e\Ob0000000RAM00000000000000`1X0000000RAM00000peEFINiP}g000000YBf;RL}NBfigW0_0000n0{VCPUxb00000W0_0000pe #gNOMO0000000gؚMO0000000000000Q000000Q000000Q000 - T: %2d g\: %2d g'Y: %2d s^GW: %2d g'Y#}000MRViQW0_0%d000MRViQW0_0%dfJT[ECC000] 000: %d, 0000: %1x, ckW0_0ECC: %s, 000000: %s, 00000/0000: %s[ECC000] 000: %d, (R,L,000,000): %s, ckW0_0ECC: %s, 000000: %s, 00000/0000: %s[000 000] 000: %d, CPU: %d, 0000: %lx%s, g_$P: %016lX, [,n$P: %016lX[000 000] 000: %d, CPU: %d, 0000: %lx%s, g_$P: %08X, [,n$P: %08XfJTNote: Your RAM may be vulnerable to high frequency row hammer bit flips. However the conditions needed to induce these errors occur only very rarely in normal PC usage, and so this should not be of concern to most users.ECC000ckSj0ECC000ck NSj0ECC000000000P}g001YWe[CPU 000] CPU %d0wRg0M0~0[00g0W0_0000 10 - }px(k0 %ld y)000 13 [p}] - pRgS-N000 13 [p] - L0x-N000 13 [p] - pi<-N[Note] RAM may be vulnerable to high frequency row hammer bit flips[ECC00000000] %ak0ECC0000leQ-N[%s 0iQ] 000: %d 0000: %lx[%s 0iQ] 000: %d (R,L,000,000): %s[%s 0iQ] 000: %d 00000/0000: %s000: %d 0000: %lx%s g_$P: %016lX [,n$P: %016lX CPU: %d000: %d 0000: %lx%s g_$P: %08X [,n$P: %08X CPU: %d000bY0h0%sn0RAM`1X0h:yW0~0Y0000bY0h0fk0sW0D0%sn0RAM`1X0h:yW0~0Y0RAM000g'Y0000^ (MHz)g'Y^ (MHz)g'Y000E^ (MB/s)000[ϑ (MB)Jedec >y TSPD00000{v2ECCDIMM0000 # t^ge,{ %d 1, %d t^%d t^00000000 #000000000000000 0000 #00000 0W000k00000W0f0D00Lpe #000k00000W0f0D00Rpe #000pe #000pe #000Q0000E^000Q00E^00000'Wi00K0000bY0h000000`1X0h:yW0~0Y0CAS000000000000000@g'Y0000hTlpe (JEDEC)g\00000000Bf0 tCK (ns)g\CAS00000Bf0 tAA (ns)g\RAS 0 CASE^0 tRCD (ns)g\L000000Bf0 tRP (ns)g\00000 0 000000Bf0 tRAS (ns)Minimum Row Active to Row Active Delay, RRD (ns)g\R000000 0 00000/R000000Bf0 tRC (ns)g\R000000 0 00000/R000000000000000 tRFC (ns)RRAM SPD`1Xo00000000n00)R(uSg0Y0i00K0000bY0h00000000k0;b0~0Y0N}00000000000000000000000000000000000000000000000000000000000001u000O(u N000ACPI0000 Nczv'`ACPIOS0000000IO00000000000IOPAL000}Q00k0o0i00K0000bW0f0O0`0U0D0Clk/)n^000CPUrKaRAM`1X0000000000Bfq}piQW0_0CPUwRW0_0CPU gRj0CPU(ESC)/-[(c)-[(1) s(Wn000000000(2) 0000B}N00000(3) 0000000k0;b00(0) }Q0000000000`#44zh-CNChinese (Simplified)N N N N N N N N N N N N N N N N N ck(W6eƖlxNOo` zP... SCPUIDOo`... SؚX[[ϑ... KmϑCPU/X[/QX[^... SCPU MSR[X[hVpenc... SQX[[ϑ... SSPD~Oo`... SQX[c6RhV~Oo`... KmՋ[b, cNa.>f:yKmՋ~g </f&T\HTML(uNQeQveNelSb_Cannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config file bN*NVhN~~O(u]/SeT.b hQX[KmՋ\N % 2ld.%01d yTꁨR_/TO(u N/ NeT.egRbc N TvKmՋ cVf.b hpQeg_/T/y(u@b vKmՋKmՋVpe %3d\ bN*NKmՋ N_/TKmՋ,`vCPU N/ecSSEcNƖeQef:y@b -NQX[!jWWv~Oo`elcKmQX[SPDOo`\e_eNS help@passmark.com>f:yQX[!jWW %d - %d (qQ %d *N!jWW) cPGUP/PGDN.egTMRbTTuQX[Oo`]OX[0R %sO(u N/ NeT. b yNۏLf9e cVf.b hpQegO9e -Nv y|~QX[0W@Wg'Yf:y~g Nub~V~V]OX[0R %sHTMLf:yKmՋ~gekBlock'Y\SQeQ*g~b0RN_vؚ~QX[KmՋ~g\^ bN*NKmՋ~ggYY b %d *NKmՋ~g NSb_BenchmarkvU_QX[RM,{ %d ek,qQ %d ek: ek %ld W[ ,{ %d ek,qQ %d ek: Block'Y\ %ld MO *gwKmՋ[bKmՋ\PbkQX[^ (MB/y. 9hnc N Tek~)QX[^ (MB/y. 9hnc N TBlock'Y\~)O(u N/ NeT.egf9eN*N y cVf.bpQ hegf9e -Nv y!QMn|~Oo`(I)KmՋ b(T)KmՋ0W@WV(A)(C)PU b_YKmՋ(S)QX[Benchma(r)k y(E)Q(X)0W@Wg\f:yQX[(SPD)~Oo` >f:yQX[O(u`Q QX[X[: %s ECCRg: %s ECCleQ: %s\QX[SPD~Oo`X[eQeNTBlockS/QeQ: KmՋ!j_: pencMO[: _Y>f:yKNMRvKmՋ~gSQeQ9hnc N Tek~QX[^9hnc N Tblock'Y\~QX[^8MO16MO32MO64MO((WS_MRKmՋ!j_ N NS(u)\VhOX[:NBMPVP\~g[Q:NHTML\ -Nv~gNVb_h:y: !KmՋ 0 [0W@WKmՋ, walking ones!j_, 1 CPU]KmՋ 1 [0W@WKmՋ, @WQeQ, 1 CPU]KmՋ 2 [0W@WKmՋ, @WQeQ]KmՋ 3 [Moving inversion {l, 1 & 0]KmՋ 4 [Moving inversion {l, 8MO!j_]KmՋ 5 [Moving inversion {l, :g!j_]KmՋ 6 [yRblock, 64W[block]KmՋ 7 [Moving inversion{l, 32MO!j_]KmՋ 8 [:gpeW[^R]KmՋ 9 [Modulo 20 {l, 1 & 0]KmՋ 10 [Bit fadeKmՋ, 2y!j_, 1 CPU]KmՋ 11 [:gpeW[^R, 64MO]KmՋ 12 [:gpeW[^R, 128MO]KmՋ 13 [$QKmՋ]bJTubegbJTubNbJT{|WQX[BenchmarkbJTi|~Oo`QX[iQX[!jWWpeϑEFIĉ< cNa.g wfY %s QX[Oo`>QX[{|W g'Yes(MHz) g'YNbcs(MHz) g'Y&^[(MB/s) QX[[ϑ(MB) JedecuNFU Ty SPDHr,g ]lQECC DIMMciSuNeg,{ %d hT, %d t^%d t^QX[!jWWSQX[!jWWHr,g QX[!jWW^RSQX[!jWWN0WL0W@WMOpeR0W@WMOpeBankpeϑRankpeϑYMO[;`~MO[QX[!jWW5uS< cNa.g weOo`>/ecvCAS^ߏ(Wgؚs Nve (JEDEC)g\ehTge, tCK (ns)g\CAS^ߏe, tAA (ns) g\RAS - CAS^ߏ, tRCD (ns)L0W@Wc6RhVEQ5ugwe, tRP (ns)QX[Lo;m}TN󁄘EQ5ugwe, tRAS (ns)v TRank, N TBank$NLo;mKNvgwe, tRRD (ns)g\LhTge, tRC (ns)NꁨR7Re}TN0R;mR}TNvgwe, tRFC (ns)<fYQX[SPDOo`(WNNHr-NcO>< cNa.ԏV;N܃US>OYuQX[ň}hVxň}hVpenc_[ gRx_[ gRpencЏLe gRxЏLe gRpenczzQX[ NS(uvQX[ACPIhACPI^f1Y'`X[Pd\O|~QX[ f\IO|~QX[ f\IOPALx< cNa.N~~>CPU;N/)n^QX[CPUr`QX[Oo`,gn!j_0W@We0W@W!j_~b0RvCPU/TRvCPU;mRCPU(ESC)/Mn(c)n(1) ǏS_MRKmՋ(2) ~_gKmՋ00(3) V0R;N܃US0(0) ~~0000<#44zh-HKChinese (Traditional)D E F G H I J K L M N O P Q R S T ck(W6eƖlxNOo` ˊ zP... rsSCPUIDOo`... rsSؚ}X[[ϑ... ,nϑCPU/}X[/gQX[^... rsSCPU MSR[X[hVxed... rsSgQX[[ϑ... rsSSPDs0}Oo`... rsSgQX[c6RhVs0}Oo`... ,nf[b, cNauo:y,nfP}g </f&T\HTML(ue[eQveN!qlSbCannot start test. The number of SPDs (%d) does not meet theminimum required (%d) as specified in the config fileCannot start test. JEDEC manufacturer (%s) in the SPD doesnot match the substring (%s) specified in the config fileCannot start test. RAM part number (%s) in the SPD doesnot match the substring (%s) specified in the config filexdN PWjN|~~O(u]/SeTub jgQX[,nf\e % 21d.%01d y_R_UO(u N/ NeTuORc N Tv,nf cVʎub jޞdO_U/y(u@bxv,nf,nfVxe %3dˊ\xdN P,nf N_U,nf,`vCPU N/ecSSEcNƖ8eQe< cNaug wfY %s gQX[Oo`>gQX[^Wg'YBf;s(MHz)g'YNcs(MHz)g'Y6^[(MB/s)gQX[[ϑ(MB)Jedecu"uFU T1zSPDHr,g];QECCDIMMci}_u"ueg,{ %d 1, %d t^%d t^gQX[!jJX}_gQX[!jJXHr,ggQX[!jJX^R_gQX[!jJX"u0WL0W@WMOxeR0W@WMOxeBankxeϑRankxeϑ-PMO[=~}MO[gQX[!jJXX< cNaug wBfOo`>/ecvCAS^r(Wgؚ;s NvBf (JEDEC)g\Bf1gBf, tCK (ns)g\CAS^rBf, tAA (ns)g\RAS - CAS^r, tRCD (ns)L0W@Wc6RhVEQgwBf, tRP (ns)gQX[Lo;m}TNEQgwBf, tRAS (ns)v TRank, N TBankiQLo;mKNvgwBf, tRRD (ns)g\L1gBf, tRC (ns)_R7Re}TN0R;mR}TNvgwBf, tRFC (ns)<fYgQX[SPDOo`(W\miHr-NcO>< cNauԏV;N܃U>OYugQX[݈ hVx݈ hVxed_\ gRx_\ gRxedKLBf gRxKLBf gRxedzzgQX[ NS(uvgQX[ACPIhACPI^f1Y'`X[2Q/ZP|q}gQX[ f\IO|q}gQX[ f\IOPALx< cNauN|~~>CPU;N;/n^gQX[CPUrKagQX[Oo`,g*!j_0W@WBf0W@W!j_~b0RvCPU_URvCPU;mRCPU(ESC)/Mn(c)-n(1) NvuMR,nf(2) P}_g,nf00(3) V0R;N܃U0(0) |~~0000iiiixi`iPi8i(iiihhhhhhhxhhhXhHh8h(hhhhgggggggpg`gPg8g gxJQꭁyw(4#?\b)?0ߑe֦bߠ g$ d0U%n8 (ު&<v@ގ]\7< peP%߻Vp48Vڭ *Cpb X[5CL[iiߣ[ fޠ[C݈{# <.[MQ.ۀ OL] ?Ԉ$^zd @Dr ǁLh7]\x4:ԗ6 xV,NiNb x ێ EU\!&ad|`36uL;|E-I8$"<THL,Kpׁ d$ >WuUxiЂN$_A8L2!Gㅀ0),S#wC8㇆-{EtN ^88{p'ڼ$ e QIqz׀ PM!< G*Ԅ$8| P@$T L͗Oc x 70> ָ; LV|Xd /nFg3Nۦ{$]O>JZ/,ok(TWQuOJZ%Fg{ـ+$Odޓ/z do?]Odo7LL ecʊ n2/Ϡ,>h%RׅpB|L_>-ʡ0)Ce38ol\S&6)4z88;*OyRMDL4U Pʛ d< .ʠ0*a8 * 8['Úp1 !8k WMWtLM̱P e< ؁Xa ^Ԅ$8| P%@;xix|$v ۣr/"x !LQCzy([Ly|] - Л솂 %B8$$8>4$T0,STPh|4$.Cݒ ϛ%@8$EQH< )O\`{ n)O\q7L ?#Cm&g}htxkObkąW  c  o!H㄀0+\/(Ll!Po5 Kw"H!EOW]+-LP z荃< @4 dԄ$8|NPz@ x$SLL !f7nxoҀ %&Xx L| 6L و狂 8;8$e$8 #c4$T 0,/TPh|4$/Cݒ ڈ8?8$ aH< ʭ/PbQ mʭ2>gSL 5]@asht>Pt~vL$$$ъ"50+-0$N Q.YA-ËցA |$$X c*84CPP< 7hߗ dԄ$8|@]+@x$ ]\LK|Xx ' ` 쉁x 2NxdL|N [ ce$ݮ$8l4$T 0,0TPh|4$ i i[l|$ $cG# u k.΀ ¯&(xh0 k.3@wLJۅbn"htw7" Pz|Aߖ |9k)F+D#6r}/$k]6ٺ8]2p,9䖀[g ZdLj| H()zd}J9'rVf}]hH|d&$:$r!n^ Fn!(xL9(5&{2itnLF|bF#S 8$5L..3DT<OLK| U1 NK68$]e$L ,u, H[AP ^F$ǁ(]j" #+3;CScsmnJ-\|/ !1Aa  0@`z{|}      CCC Þ&ÞÞ/BD7q۵[V9Y?^[1$} Ut]rހܛtiGƝ̡ $o,-tJܩ\ڈvRQ>m1'Y GQcg)) '8!.m,M 8STs e jv.,r迢KfpK£Ql$օ5pjl7LwH'4 9JNOʜ[o.htocxxȄnjlPxqg jgrn<:ORQhك["(ט/Be#D7q/;Mۉ۵8H[V9YO?m^BؾopE[N1$} Uo{t]r;ހ5%ܛ&itJi%O8GՌƝew̡ $u+Yo,-ntJAܩ\SڈvfRQ>2-m1?!'Y= % GoQcpn g))/F '&&\8!.*Zm,M߳ 8ScTs ew< jvG.;5,rdL迢0BKfpK0TQlReU$* qW5ѻ2pjҸSAQl7LwH'Hᵼ4cZų 9ˊAJNscwOʜ[o.h]t`/CocxrxȄ9dnj(c#齂lPyƲ+SrxqƜa&>'!Ǹ}xnO}orgȢ}c ?G5 q}#w($@{2 ˾L*~e)Y:o_XGJDl؞]|6*)bp0ZY9Y/1 g&3gXhJd . ۤOHGɼg j;ʄg+rn<6_:OтRQl>+hkAكy!~[opqrstuv @zh-HKzh-CNja-JPde-DEes-ARfr-FRen-USAttempting to retrieve the root directory of the data partition.Could not get DevicePath protocol: %rCould not get list of handles that support SimpleFileSystem protocol: %rFound %d handles that supported SimpleFileSystemChecking handle %d (%x)Handle is own partitionHD node found: MBR type(%x), Signature type(%x), Part #(%d), Start LBA(%ld), Num Sectors(%ld)Self node: MBR type(%x), Signature type(%x), Part #(%d), Start LBA(%ld), Num Sectors(%ld)Handle matchesCould not open root directory.EFI\BOOTCould not open EFI\BOOT directory, using root directorySuccessfully opened EFI\BOOT directory.=============================================1000V6.3.0 FreeMemTest86%s %s Build: %s (64-bit)Manufacturer: %a, Product: %a, Version: %a, S/N: %a, AssetTag: %a, LocationInChassis: %aConsole Control protocol workaround requiredConsole size = %d x %dInitializing localization stringsFont does not support all languages. Installing unicode font...unifont.binCould not install font (%r). Some languages may not be availableIntializing screen for graphicsScreen size = %d x %dAChar width=%d height=%dInstalling default testsLoading imagesCould not load MemTest86 logo imageCould not load splash screen icon %dCould not load MemTest86 header imageCould not load sidebar button %dCould not load selection overlay imageCould not load CPU text header imageCould not load Memory text header imageMemTest86-Report%s-%d%02d%02d-%02d%02d%02d.htmlTest aborted. The number of detected RAM SPDs (%d) is less than the minimum required (%d)Test aborted. The JEDEC manufacturer within the SPD ("%s") does not match the substring ("%s")Test aborted. The RAM part number within the SPD ("%s") does not match the substring ("%s")\%sCould not locate HiiFont protocol: %rGetGlyph failed for character 0x%04X (%r)is supportedis not supportedLanguage %a %sInitFont - Could not locate HiiDatabase protocol: %rInitFont - Unable to open %s: %rInitFont - Read header failed: %r (BufSize=%d)PASSInitFont - Invalid signatureInitFont - Invalid glyph infoInitFont - Font header version: %d.%dInitFont - Number of narrow glyphs: %dInitFont - Number of wide glyphs: %dInitFont - Unable to get file size: %r InitFont - Invalid font fileInitFont - Read glyphs failed: %r (BufSize=%d)InitFont - Integrity check failedCould not add font - HiiAddPackages failedUnable to initialize localization string packCould not locate HiiString protocol: %rCould not locate HiiDatabase protocol: %rSearching for FrameworkHii protocol...Could not locate FrameworkHii protocol: %rFound %a package (Length: %d)[%a][%d] Found skip block 1: %d[%a][%d] Found skip block 2: %dUnexpected block type: %xFinished parsing localization stringsGetString returned %rGetting CPUIDGetting cache sizeMeasuring CPU/cache/mem speedRetrieving CPU MSR dataGetting memory sizeGetting memory SPD infoGetting memory controller infoget_cache_size - Vendor ID: %a Brand ID: %aL1 instruction cache size: %d x %dKBL1 instruction cache size: %dKBL1 data cache size: %d x %dKBL1 data cache size: %dKBL2 cache size: %d x %dKBL2 cache size: %dKBL3 cache size: %d x %dKBL3 cache size: %dKBcpu_cache_speed - (Attempt %d) clock cycle (ms): %dcpu_cache_speed - Using average of last %d samples (%d)cpu_cache_speed - Using average of last %d samples (%d, %d, %d)cpu_cache_speed - CPU speed: %3d.%1dMHzcpu_cache_speed - measuring L1 cache speed at 0x%lx (%d KB)cpu_cache_speed - L1 cache speed: %d MB/scpu_cache_speed - measuring L2 cache speed at 0x%lx (%d KB)cpu_cache_speed - L2 cache speed: %d MB/scpu_cache_speed - measuring L3 cache speed at 0x%lx (%d KB)cpu_cache_speed - L3 cache speed: %d MB/scpu_cache_speed - Memory latency: %d.%03d nsget_mem_speed - measuring mem speed at 0x%lx (%d KB)get_mem_speed - mem speed: %d MB/smem_size - Unable to allocate mem pool for memory map (%d bytes)mem_size - GetMemoryMap failed (%d)mem_size - Memory descriptor version incorrect (%d)mem_size - Number of entries: %dmem_size - Max address: 0x%lxmem_size - Total memory size(%ld bytes)Could not find SMBus controller. Checking if disabled...Could not enable SMBus controller.Failed to allocate memory for SPD infoX8DTU-6+Supermicro X8DTU-6+ baseboard found. SMBus MUX present.X8DTU-LN4+Supermicro X8DTU-LN4+ baseboard found. SMBus MUX present.X8DTNSupermicro X8DTN baseboard found. SMBus MUX present.Z8P(N)E-D12(X)ASUS Z8P(N)E-D12(X) baseboard found. SMBus MUX present.Failed to re-allocate memory for SPD info (old size=%d, new size=%d)[%s %s Bus:%.2X Dev:%.2X Fun:%.2X] Looking for SPDFailed to retrieve SPD info. Enumerating PCI bus...Getting SMBIOS Memory Device info...Found %d Memory DevicesFailed to allocate memory for SMBIOS memory device info[Slot %d] TotalWidth: %d, DataWidth: %d, Size: %d, FormFactor: %d, DeviceSet: %d, MemoryType: %d, Speed: %d, Attributes: %d, ExtendedSize: %d, ConfiguredMemoryClockSpeed: %d, MinimumVoltage: %d, MaximumVoltage: %d, ConfiguredVoltage: %d[Slot %d] DeviceLocator: %a, BankLocator: %a, Manufacturer: %a, S/N: %a, AssetTag: %a, PartNumber: %aNumber of non-empty SMBIOS memory devices found: %dFailed to re-allocate memory for SMBIOS mem device info (old size=%d, new size=%d)cpuspeed - rdtsc instruction supported: %dcpuspeed - start ticks: %ld, end ticks: %ld (difference: %ld)Warning - no mouse detectedMemTest86 V6.3.0 FreeScreen resolution is too low (%d x %d). Setting screen size to the minimum %d x %dNew screen size = %d x %dUnable to set screen size* [ CPU ]%s:%dC%d%d x %dK (%d MB/s)%dK (%d MB/s)[ Memory ]%ldM (%d MB/s)%d.%03d ns%s (%s)%2d: %s0 - %d %d %s: %ld BytesSearching for previous benchmark results...BenchmarkError opening Benchmark directory: %r.ptxFound benchmark results: %sUnable to open %s: %r, %dbit%ldMB%d-%02d-%02d %02d:%02d:%02d / %s / %s%s / %sError opening file %s: %rReadWriteRunning MEM_STEP test (%s)Number of memory steps: %d (Block size: %ld Bytes)Step %d of %d: Step size %ld bytesMEM_STEP test cancelled by userRunning MEM_BLOCK test (%s, %d-bit)Number of blocks: %dStep %d of %d: Block Size: %ld, Data Size %ld Bits% 16ld BytesMEM_BLOCK test cancelled by usermt86Bench%s\%s-%d%02d%02d-%02d%02d%02d.ptxTest has completed successfully. Saving results to %sUnable to open %s for writing (%r)ECC %s %s %s%sMHz%ldKB%ld%s%s/<h2>%s</h2> <div class="summary"> <table> <tr> <td width="35%%">%s</td> <td width="65%%">%d-%02d-%02d %02d:%02d:%02d</td> </tr> <td width="65%%">%s %s (64-bit)</td> </table> </div> <div class="results"> <p> </p> <td width="20%%" class="header">%s</td> %ld.%1d%d.%1d%ld.%1ld Start memory range test (0x%lX - 0x%lX)Pre-allocating memory ranges >=16MB first...Could not pre-allocate memory range 0x%lX - 0x%lX (%r)All memory ranges successfully lockedCould not allocate memory range 0x%lX - 0x%lX (%r)RunMemoryRangeTest - Switching BSP from Proc# %d --> %dRunMemoryRangeTest - Could not switch BSP to Proc#%d (%r)RunMemoryRangeTest - Could not start AP#%d 0x%016lx - 0x%016lx (%r). Resetting...RunMemoryRangeTest - Unable to start AP#%d 0x%016lx - 0x%016lx (%r)RunMemoryRangeTest - CPU #%d completed but did not signal (test time = %ldms, event wait time = %ldms, result = %r) (BSP test time = %ldms)WARNING - waited for %lds for CPU #%d to finish (BSP test time = %ldms)RunMemoryRangeTest - CPU #%d timed out, test time = %ldms (BSP test time = %ldms)CPU #%d did not abort properly.Cleanup - Releasing all memory ranges...Start bit fade test (0x%lX - 0x%lX)Locking all memory ranges first...Skipping memory range 0x%lX - 0x%lX (%dKB of available memory left)Reducing memory range: 0x%lX - 0x%lX ==> 0x%lX - 0x%lXCould not lock memory range 0x%lX - 0x%lX (%r) (%dKB of available memory left)Memory range locked: 0x%lX - 0x%lX (%dKB of available memory left)Starting Stage %d, Pattern=%08XMemory range 0x%lX - 0x%lX was not locked. Ignoring...Finished Stage %d, Pattern=%08XSlept for %ld secondsCleanup - Unlocking all memory ranges...Start hammer test (0x%lX - 0x%lX)RunHammerTest - Switching BSP from Proc# %d --> %dRunHammerTest - Could not switch BSP to Proc#%d (%r)RunHammerTest - Running hammer test on %d CPUs (%ldMB each)RunHammerTest - Could not start AP#%d 0x%016lx - 0x%016lx (%r). Resetting...RunHammerTest - Unable to start AP#%d 0x%016lx - 0x%016lx (%r)RunHammerTest - CPU #%d completed but did not signal (test time = %ldms, event wait time = %ldms, result = %r) (BSP test time = %ldms)RunHammerTest - CPU #%d timed out, test time = %ldms (BSP test time = %ldms)Fast hammering test failed. Repeat test again with slow hammering. Slow hammering shall performed for the remainder of the test.Slow hammering test passed. Warnings reported*** TEST SESSION - %d-%02d-%02d %02d:%02d:%02d ***CPU selection mode = %dStarting pass #%d (of %d)Running test #%d (%s)MtSupportRunAllTests - Switching BSP from Proc# %d --> %dMtSupportRunAllTests - Could not switch BSP to Proc#%d (%r)MtSupportRunAllTests - Injecting ECC errorAMD 15hAMD 16hAMD Steppe EagleAMD 15h (30h-3fh)Intel NehalemIntel LynnfieldIntel WestmereIntel E3-1200v3Intel E3-1200Intel E3-1200v2Intel Ivy BridgeIntel SkylakeIntel Atom C2000 SoC Transaction RouterMtSupportRunAllTests - Setting random seed to 0x%08XMtSupportRunAllTests - Start time: %ld msEnablingDisablingMtSupportRunAllTests - %s memory cache for testMtSupportRunAllTests - %s memory cache completeMtSupportRunAllTests - Test execution time: %d.%03d (Test %d cumulative error count: %d)MtSupportRunAllTests - Stopping ECC injectionTest abortedTest restarting...Finished pass #%d (of %d) (Cumulative error count: %d)%d/%d%04Xyesno[MEM ERROR - ECC] Test: %d, Address: %lx, ECC Corrected: %s, Syndrome: %s, Channel/Slot: %s(,%x,)%x)[MEM ERROR - ECC] Test: %d, (Col,Row,Rank,Bank): %s, ECC Corrected: %s, Syndrome: %s, Channel/Slot: %s[Parity] Test: %d Addr: %lx CPU: %d[MEM ERROR - Parity] Test: %d, CPU: %d, Address: %lxB/%s%d%d[MEM ERROR - Data] Test: %d, CPU: %d, Address: %lx%s, Expected: %016lX, Actual: %016lX[MEM ERROR - Data] Test: %d, CPU: %d, Address: %lx%s, Expected: %08X, Actual: %08X[MEM ERROR] Truncating due to too many errors[MEM WARNING] Test: %d, CPU: %d, Address: %lx%s, Expected: %016lX, Actual: %016lX[MEM WARNING] Test: %d, CPU: %d, Address: %lx%s, Expected: %08X, Actual: %08XUNKNOWNSDRAMPC%d%dMB/sDDRDDR-%dDDR2DDR2-%dPC2-%dDDR2FBPC-%dDDR2FBPROBEDDR3DDR3-%dPC3-%dDDR4DDR4-%dPC4-%d%d-%d-%d-%d XMP EPP%s %s %s%sMHz / %s / %s %aOtherUnknownDRAMEDRAMVRAMSRAMRAMROMFLASHEEPROMFEPROMEPROMCDRAM3DRAMSGRAMRDRAMDDR2 FB-DIMMReservedFBD2LPDDRLPDDR2LPDDR3LPDDR4%s %s %s%sMHz / %a %aYesNoRDIMMMini-RDIMM72b-SO-RDIMMMulti load stackSingle load stackMonolithicNon-monolithicLRDIMMUDIMMSO-DIMM%s: %s XMPEMPJEDEC %s: %d (%s) %s: %s %s: %d %s: %d.%d %s: %a %s: 0x%04X %s: 0x%08X %s: 0x%02X %s: %d-%d-%d-%d %s: %d %s: %d.%03d 0x%012lx - 0x%012lx (%ldMB) {%s} 0x%012lx - 0x%012lx (%ldKB) {%s} %s: 0x%lx (%ldGB) %s: 0x%lx (%ldMB) %s: 0x%lx (%ldKB) %s: 0x%lx (%ldB) %3d.%1d MHz%d MHz [Turbo: %d.%1d MHz]MemTest86.log%d-%02d-%02d %02d:%02d:%02d - truefalse%s : %d-%02d-%02d %02d:%02d:%02d %s : %d:%02d:%02d %s: %d/%d (%d%%) %s: 0x%p (%ldMB) %s: %s %s: 0x%p (%ldMB) %s: %s %s: %016lX %s: %7d %s: %8d %s: %d %s %s %2d %8d <html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <style> body, p { font-family: Arial, sans-serif; color:black; width: 600px; font-size: 10px} h1 { width: 640px; margin-bottom:20px; } h2 { width: 640px; margin-bottom:15px; font-size: 16px; font-weight: normal} .header table { width: 640px; margin:0px; text-align: left; } .summary table, tr { width: 600px; margin-left:20px; font-size: 10px; margin-bottom: 20px; border-collapse: collapse; } .summary td { padding-left:5px; } .summary td.PASS { } .summary td.FAIL { } .sysinfo table, tr { width: 600px; margin-left:20px; font-size: 10px; margin-bottom: 20px; border-collapse: collapse; } .sysinfo td { border: 1px solid black; padding-left:5px; text-align: left; } .sysinfo td.value { } .sysinfo td.subvalue { padding-left:25px; } .sysinfo td.altvalue { } .results table { width: 600px; margin-left:20px; font-size: 10px; margin-bottom: 20px; border-collapse: collapse; } .results tr.fail { } .results td { border: 1px solid black; padding-left:5px; text-align: left; } .results td.value { } .results td.altvalue { } .results td.PASS { } .results td.FAIL { } .results td.header { background-color:#222222; color:white; } .footer { font-size: 10px; margin-top: 10px; text-align: left} .footer p { font-size: 9px; border-top: solid #000000 1px; margin-top: 10px; } .footer table, tr { width: 600px; margin-left:20px; font-size: 10px; margin-bottom: 20px; border-collapse: collapse; } .footer td { padding-left:5px; border: none} </style></head> <body> <div class="header"> <td> <img src="mt86.png"> </td> <div class="sysinfo"> <td width="35%%" class="value">%s</td> <td width="65%%" class="altvalue">%d.%02d</td> <td width="65%%" class="altvalue">%s</td> <td width="35%%" class="subvalue">%s</td> <td width="65%%" class="altvalue">%d</td> <td width="65%%" class="altvalue"><td width="65%%" class="altvalue">%d x %dK (%d MB/s)</td> <td width="65%%" class="altvalue">%dK (%d MB/s)</td> <td width="65%%" class="altvalue">%ldM (%d MB/s)</td> %dGB%dMB<td width="35%%" class="subvalue"> %s%d</td> <td width="65%%" class="altvalue">%s %s %s%s</td> <td width="35%%" class="subvalue"></td> / %a%08X<td width="65%%" class="altvalue">%s / %s MHz / %s</td> %ldGB<td width="65%%" class="altvalue">%a / %a</td> <td width="65%%" class="altvalue">%s MHz</td> <h2>Certification</h2> <div class="footer"> <table width="640"> This document certifies that the Tests described above have been carried out by a suitably qualified technician on the System described above. Signed<br><br> ___________________________<br> Put your company name here:<br> Level 5, 63 Foveaux St, Surry Hills, 2010, Sydney, Australia<br> Phone + 61 2 9690 0444 Fax + 61 2 9690 0445<br> E-Mail: info@passmark.com<br> </body> </html> <td width="65%%" class="PASS">%s</td> <td width="65%%" class="FAIL">%s</td> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">%d-%02d-%02d %02d:%02d:%02d</td></tr> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">%d:%02d:%02d</td></tr> <td width="65%%" class="altvalue">0x%lx - %lx (%ldMB)</td> <td width="65%%" class="PASS">%d/%d (%d%%)</td> <td width="65%%" class="FAIL">%d/%d (%d%%)</td> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">0x%p (%ldMB)</td></tr> <tr><td width="35%%" class="value">%d</td><td width="65%%" class="altvalue">%s</td></tr> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">%s</td></tr> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">%016lX</td></tr> <tr><td width="35%%" class="value">%s</td><td width="65%%" class="altvalue">%d</td></tr> <td width="60%%" class="header">%s</td> <tr class="fail"> <td width="60%%" class="value">%s</td> <td width="20%%" class="altvalue">%d/%d (%d%%)</td> <td width="20%%" class="altvalue">%d</td> <tr><td class="header"></td></tr> [Parity Error] Test: %d, CPU: %d, Address: %lx<tr><td class="value">%s</td></tr> %s %s - SyncEnableCacheAllAPs - %s memory cache for %d processorsenabledisableSyncEnableCacheAllAPs - Could not %s cache on AP#%d (%r). Resetting...SyncEnableCacheAllAPs - Unable to %s cache on AP#%d (%r)SyncEnableCacheAllAPs - Proc %d has not finished %s memory cache: 0x%016lX: 0x%08X: 0x%lx - 0x%lx:Warning - attempting to set tests completed (%d) higher than the number of tests (%d)%3d%% #%d / %d%5d>Warning - Setting total progress to 0Warning - attempting to set progress (%ld) higher than total progress (%ld)%4d:%02d:%02d%cW / %dC(R)(TM)(tm)CPUProcessorTechnologyGenuineprocessor with Radeon HD GraphicsAMD 486DX2AMD 486DX2-WBAMD 486DX4AMD 486DX4-WBAMD 5x86-WTAMD 5x86-WBAMD K5AMD K6AMD K6-2AMD K6-IIIAMD K6-III+AMD Athlon (0.25)AMD Athlon (0.18)AMD Duron (0.18)Athlon XP (0.18)AMD Duron (0.13)Athlon XP (0.13)AMD DuronTM 5x00TM 8x00Intel 486DXIntel 486SXIntel 486DX2Intel 486SLIntel 486SX2Intel 486DX2-WBIntel 486DX4Intel 486DX4-WBPentiumPentium-MMXPentium ProPentium IICeleronPentium IIICeleron M (0.13)Pentium M (0.13)Pentium III XeonAtom (0.045)Celeron M (0.09)Pentium M (0.09)Intel CorePentium EIntel Core 2Pentium 4Celeron (0.09)Pentium 4 (0.09)Pentium D (65nm)Unknown IntelCentaur 5x86VIA C3 Samuel2VIA C3 EdenVIA C7 (C5J)VIA C7 (C5R)VIA Isaiah (CN)Cyrix 6x86MX/MIICyrix GXmCyrix IIIVIA C3 Ezra-TVIA C3 Nehemiah586686Unidentified ProcessorPassMark %s %s-| %s: 64-bit:%4d.%1d MHz:%6d MHz:%5dK%6d MB/s: %s:%5dM: %s| %s:%3dGetTextInfo - StringToImage failed: %rGetTextInfo - **Warning** "%s" Text Width: %ld, Height: %ldGetTextInfo - **Warning** "%s" RowInfoArraySize: %dGetMode failed: %rNo graphics protocol foundStringToImage returned: %rWarning - RowInfoArraySize=%dWarning - Text outside screen (XPos=%d, YPos=%d, Width=%d, Height=%d)GraphicsOutputUgaDraw%s Blt returned: %r (Text="%s" XPos=%d, YPos=%d, Width=%d, Height=%d, Delta=%d)%d%%Invalid TestInfo node type: %dTypeStartTimeNumCPUCPUTypeCPUSpeedInvalid Version node type: %dMajorMinorBuildSpecialBuildNameArchitectureInvalid MemTestHeader node type: %dTotalPhysTestModeAveSpeedAveCPULoadModuleManufModulePartNoRAMTypeRAMTimingIsReadArraySizeMinBlockMaxBlockAccessDataSizeInvalid Checksum node type: %dInvalid Checksum length: %dBenchmark results file is invalidRoot node does not existInvalid root node type: %dInvalid number of sections: %dTestInfo node does not existTestInfoInvalid section (%d, %a), expected "TestInfo"Version node does not existVersionInvalid section (%d, %a), expected "Version"Header node does not existMemTestHeaderInvalid section (%d, %a), expected "MemTestHeader"Results node does not existResultsInvalid section (%d, %a), expected "Results"Invalid results node type: %dInvalid number of samples: %dSample node does not existInvalid sample node type: %dInvalid sample node item count: %dBandwidth node does not existStep Size node does not existChecksum node does not existChecksumInvalid section (%d, %a), expected "Checksum"Failed integrity checkMemory error: Not enough memory for parsing Reader error: %a: #%X at %d Reader error: %a at %d Scanner error: %a at line %d, column %d %s at line %d, column %d Scanner error: %a at line %d, column %d Parser error: %a at line %d, column %d %s at line %d, column %d Parser error: %a at line %d, column %d %s%d%ld4`erx,R;0g% 6RL>?{ &3!g0DaHL`njNUZ]Ugm`#;qKxYp80D{tw#HH>KgXf*!3p)hIuh^)12eOo9o=E#*+gvh,9gL#N45#7#Dq1aiYq,`XOQiP>4&.nEaU60123456789abcdefCompromised DataInvalid LanguageEnd of FileReserved (30)Reserved (29)End of MediaCRC ErrorSecurity ViolationIncompatible VersionProtocol ErrorTFTP ErrorICMP ErrorAbortedAlready startedNot startedTime outNo mappingNo ResponseAccess DeniedNot FoundMedia changedNo MediaVolume FullVolume CorruptOut of ResourcesWrite ProtectedDevice ErrorNot ReadyBuffer Too SmallBad Buffer SizeUnsupportedInvalid ParameterLoad ErrorWarning Stale DataWarning Buffer Too SmallWarning Write FailureWarning Delete FailureWarning Unknown GlyphSuccess0123456789ABCDEF%08x-%04x-%04x-%02x%02x-%02x%02x%02x%02x%02x%02x%02d/%02d/%04d %02d:%02d%08X DPCMCIAMPSupportStartMemTestAP - CreateEvent failedMPSupportEnableCacheAP - CreateEvent failedMPSupportResetProc - Unable to disable processor %d: %rMPSupportResetProc - Unable to enable processor %d: %rUnable to switch BSP to Proc #%d: %r Unable to locate the PI MpServices procotol: %rUnable to locate the Framework MpServices procotol: %rSuccessfully located the Framework MpServices procotol.Successfully located the PI MpService protocol.WhoAmI failed: %r. Setting BSP to 0.BSP is Proc %dUnable to get the number of processors: %rThis platform has %d logical processors of which %d are enabled.Warning: BSP ID (%d) is greater than the number of processors (%d). Setting BSP ID to 0. ProcID Enabled Type Status Pkg Core Thread-------- -------- ---- -------- ----- ---- ------Unable to enable processor %d: %rUnable to get information for processor %d: %rBSP APYN%08Lx %s %3s %08x %4d %2d %dWarning - The number of processors (%d) is greater than the maximum supported (%d)Warning - The number of enabled processors detected (%d) does not match the number of enabled processors reported (%d)/3O/Oo...MtRangesLockRange - AllocatePages(Start=0x%lx,Pages=%ld) retuned %rReadMemoryRanges - GetMemoryMap retuned %r (Size = %d)ReadMemoryRanges - Could not allocate a memory pool of size = %dReadMemoryRanges - GetMemoryMap failed (%r)ReadMemoryRanges - Memory descriptor version (%d) different from expected (%d)ReadMemoryRanges - Available Pages = %ldGenuineIntelCPU CorePPack: %d (0x%8X)AuthenticAMDCentaurHaulsCentaulsaurHL1 data cache: %d, %d, %d [0x%8X]GetIntelArchitectureSpecificMSRInfo - CPU %a: %d.%dGetIntelArchitectureSpecificMSRInfo - Nehalem et al detectedGetIntelArchitectureSpecificMSRInfo - Turbo disabledGetIntelArchitectureSpecificMSRInfo - MaxRatio = %dGetIntelArchitectureSpecificMSRInfo - Mult = %dGetIntelArchitectureSpecificMSRInfo - raw_freq_cpu = %dGetIntelArchitectureSpecificMSRInfo - TargetRatio = %dGetIntelArchitectureSpecificMSRInfo - MaxTurboRatio = %dGetIntelArchitectureSpecificMSRInfo - TurboMult = %dGetIntelArchitectureSpecificMSRInfo - new TurboMult = %dGetIntelArchitectureSpecificMSRInfo - CPUSpeedTurbo = %dGetIntelArchitectureSpecificMSRInfo - CPUSpeedTurboTheoreticalMax = %dGetIntelArchitectureSpecificMSRInfo - MaxCPUFreq = %dGetIntelArchitectureSpecificMSRInfo - BusFrequencyRatio = %dGetIntelArchitectureSpecificMSRInfo - Freq: %d, %d, %d, Turbo: %d, %d, %d (%d)GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - CPUID[0x6][ECX] = %08xGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - CPUID[0xA][EDX] = %08xGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - *WARNING* IA32_FIXED_CTR1 performance counter reported to be unavailable.GetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38F] = %016lxGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x38D] = %016lxGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x199] = %016lxGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - MSR[0x198] = %016lxGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - high perf counter freq = %ldGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - time in ns = %ldGetIntelCPUMaxSpeed_CPU_CLK_UNHALTED - FreqCore in KHz = %d, FreqRef in KHz = %d, Ratio = %dGetIntelCpuMaxSpeed_IA32_APERF - CPUID[0x6][ECX] = %08xGetIntelCpuMaxSpeed_IA32_APERF - high perf counter freq = %ldGetIntelCpuMaxSpeed_IA32_APERF - time in ns = %ldGetIntelCpuMaxSpeed_IA32_APERF - FreqMPERF in KHz = %d, FreqAPERF in KHz = %dCBCABYBWBVBUBTBRBPBNBMBLBKBJBHBGBFBEBDBCBBBAAYAWAVAUATARAPANAMALAKAJAHAGAFAEADACABAAVUTRPMLKJHGFECHi-ImpedanceRZQ (240ohm)Dynamic ODT OffRZQ/3 (80ohm)RZQ (240ohmRZQ/4 (40ohm)RZQ/2 (120ohm)RZQ/6 (60ohm)DisabledRZQ/4 (60ohm)RZQ/5 (48ohm)RZQ/7 (34ohm)RZQ/6 (40ohm)Very Strong DriveStrong DriveModerate DriveLight DriveUnlimited MAC200 K300 K400 K500 K600 K700 KUntested MACPlaceholder32b-SO-DIMM16b-SO-DIMMExtended72b-SO-CDIMM72b-SO-UDIMMMini-CDIMM> 9.08.0 - 9.07.0 - 8.06.0 - 7.0< 6.0FB-DIMM35 - 4030 - 3525 - 3020 - 2515 - 20UndefinedMini-UDIMMMicro-DIMM> 30.530.530.025.4 - 30.025.4< 25.4512 MB256 MB128 MB64 MB32 MB4 GB/16 MB2 GB/8 MB1 GB/4 MBExtended (125us)Extended (62.5us)Extended (31.3us)Reduced (7.8us)Reduced (3.9us)Normal (15.625us)SSTL 1.8VSSTL 2.5VSSTL 3.3VHSTL 1.5VLVTTL (not 5V tolerant)TTL (5V tolerant)Intel801SelectSMBusSeg: GPIO base address=%04X, seg=%dIntel801SelectSMBusSeg: GPIO_USE_SEL2=%08X, GP_IO_SEL2=%08XIntel801SelectSMBusSeg: GP_LVL[48:63]=%04XIntel801SelectSMBusSeg: New GP_LVL[48:63]=%04XDevice detected on SMBUS at address %02X (Intel801)Maximum number of memory modules exceeded (%u)smbCallBusIntel801: Unable to acquire SMBus resourcesmbWaitForFreeIntel801: Timeout exceededsmbWaitForEndIntel801: Timeout exceededsmbAcquireSMBusIntel801: Forcing release of semaphoresmbAcquireSMBusIntel801: Semaphore could not be released. Ignoring semaphore bit.smbSetBankAddrIntel801: Unable to acquire SMBus resourcesmbSetBankAddrIntel801: Setting SMB_ADDR=%08XsmbSetBankAddrIntel801: Waiting for endSMB_STAT[%d]=%08XSMBCMD[%d]=%08XSMBCNTL[%d]=%08XUnable to retrieve data at offset %d after %d triesDevice detected on SMBUS at channel %d, slot %d (Intel801_MMIO)Restoring old SMBus register values for channel %ismbSetBankAddrIntel801_MMIO: Setting SMBCNTL=%08XsmbSetBankAddrIntel801_MMIO: Setting SMBCMD=%08XsmbSetBankAddrIntel801_MMIO: Waiting for endsmbWaitForEndIntel801_MMIO: Timeout (Status=%08X)smbWaitForEndIntel801_MMIO: Device Error (Status=%08X)smbWaitForEndIntel801_MMIO: Device Error (Status=%08X Command=%08X Control=%08X)Device detected on SMBUS at branch %d, slot %d, slave addr %d (smbCallBusIntel5000_PCI)smbCallBusIntel5000_PCI: smbWaitForFreeIntel5000_PCI failedsmbCallBusIntel5000_PCI: maximum retry exceededsmbWaitForEndIntel5000_PCI: Timeout (Status=%08X)smbWaitForEndIntel5000_PCI: Bus Error (Status=%08X)Device detected on SMBUS at slave addr %d (smbCallBusIntel5100_PCI)smbCallBusIntel5100_PCI: smbWaitForFreeIntel5100_PCI failedsmbCallBusIntel5100_PCI: maximum retry exceededsmbWaitForEndIntel5100_PCI: Timeout (Status=%08X)smbWaitForEndIntel5100_PCI: Bus Error (Status=%08X)Device detected on SMBUS at address %02X (Nvidia)Device detected on SMBUS at address %02X (PIIX4)Device detected on SMBUS at address %02X (Via)Device detected on SMBUS at address %02X (AMD756)Device detected on SMBUS at address %02X (SiS96x)Device detected on SMBUS at address %02X (SiS968)smbWaitForFreeSiS968: Timeout (Status=%08X)smbWaitForEndSiS968: Timeout (Status=%08X)smbWaitForEndSiS968: bus error (Status=%08X)Device detected on SMBUS at address %02X (SiS630)smbWaitForFreeSiS630: Timeout (Status=%08X)smbWaitForEndSiS630: Timeout (Status=%08X)smbWaitForEndSiS630: Device Error (Status=%08X)smbWaitForEndSiS630: Bus Error (Status=%08X)Device detected on SMBUS at address %02X (Ali1563)Raw SPD bytes for DIMM#%d:%02X SPD rev: 0x%02XUnable to decode RAM typeModule Manufacturer: %s (Bank: %d, ID: 0x%02X)Module manufacturing location: 0x%02XModule Part Number: %aRevision Code: %04XManufacturing Date: Year %d Week %dModule serial number: 0x%08XMaximum clock speed: %d MHzMaximum module speed: %d MHz (%dMB/s)Banks x Rows x Columns x Bits: %d x %d x %d x %dRanks: %dSDRAM Device Width: %d bitsSize: %d MBECC: %sVoltage Interface Level: %sRefresh Rate: %sSupported Burst Lengths: %sSupported CAS Latencies (tCL): %sSupported timing at highest clock speed (%d MHz): %d-%d-%d-%dSupported CS Latencies: %sSupported WE Latencies: %sBuffered address and control inputs: %sRegistered address and control inputs: %sOn-Card PLL (Clock): %sBuffered DQMB Inputs: %sRegistered DQMB Inputs: %sDifferential clock input: %sSupports Early RAS# Precharge: %sSupports Concurrent Auto Precharge: %sSupports Precharge All: %sSupports Write/Read Burst: %sLower Vcc tolerance: %sUpper Vcc tolerance: %sClock cycle time at highest CAS latency: %d.%03dData access time at highest CAS latency: %d.%03dClock cycle time at medium CAS latency: %d.%03dData access time at medium CAS latency: %d.%03dClock cycle time at shortest CAS latency: %d.%03dData access time at shortest CAS latency: %d.%03dAddress/Command Setup Time Before Clock (tIS): %d.%03dAddress/Command Hold Time After Clock (tIH): %d.%03dData Input Setup Time Before Strobe (tDS): %d.%03dData Input Hold Time After Strobe (tDH): %d.%03dMinimum CAS latency time (tAA): %d.%03dMinimum Row Precharge Delay (tRP): %d.%03dMinimum Row Active to Row Active Delay (tRRD): %d.%03dMinimum RAS# to CAS# Delay (tRCD): %d.%03dMinimum RAS# Pulse Width (tRAS): %d.%03dRevision Code: 0x%04XMaximum module speed: %d MHz (PC%d)SDRAM ECC/parity width: %d bitsBank density: %d.%01d FET switch on-card enable: %sFET switch external enable: %sIncludes weak driver: %sSupports Fast AP: %sMaximum Cycle Time (tCK max): %d.%03dData Input Hold Time After Strobe (tDH): Minimum Active to Auto-refresh Delay (tRC): %d.%03dMinimum Recovery Delay (tRFC): %d.%03dMaximum DQS to DQ Skew (tDQSQ): %d.%03dMaximum Read Data Hold Skew (tQHS): %d.%03d1.125" to 1.25"1.7"UnavailableModule Height: %sMaximum module speed: %d MHz (PC2-%d)Module Height: %s mmModule Type: %sNumber of PLLs: %dAnalysis probe installed: %sSupports weak driver: %sSupports 50 ohm ODT: %sSupports Partial Array Self Refresh: %sStackPlanarDRAM Package: %s84 Write Recovery Time (tWR): %d.%03dMinimum Write to Read CMD Delay (tWTR): %d.%03dMinimum Read to Pre-charge CMD Delay (tRTP): %d.%03dPLL Relock Time: %d.%03dEPP supported: YesEPP Profile Type: Abbreviated ProfilesEPP optimal profile: Profile AP%d[EPP profile AP%d] EPP profile enabled: %s%d.%03dV Voltage Level: %s Command Rate: %dT SDRAM Cycle Time (tCK): %d.%03d Maximum clock speed: %d MHz Supported CAS Latency: %d Minimum RAS to CAS delay (tRCD): %d.%03d Minimum Row Precharge Time (tRP): %d.%03d Minimum Active to Precharge Time (tRAS): %d.%03dEPP Profile Type: Full ProfilesEPP optimal profile: Profile FP%d[EPP profile FP%d]1.0x1.25x1.5x2.0xN/A Address Drive Strength: %s Chip Select Drive Strength: %s%d.%03dx Clock Drive Strength: %s Data Drive Strength: %s DQS drive strength: %s0 MEMCLK%d/64 MEMCLK Address/Command fine delay: %s1/2 MEMCLK1 MEMCLK Address/Command setup time: %s Chip Select fine delay: %s Chip Select setup time: %s Write Recovery Time (tWR): %d.%03d Minimum Active to Auto-refresh Delay (tRC): %d.%03dDRAM Manufacturer: %s (Bank: %d, ID: 0x%02X)Module type: %sFine time base (ps): %d.%03dMedium time base (ns): %d.%03dMaximum module speed: %d MHz (PC-%d)SDRAM Device Width: %dModule height: %sModule thickness: %sSupported CAS: %sMinimum cycle time (tCK_min): %d.%03dMaximum cycle time (tCK_max): %d.%03dMinimum RAS to CAS delay time (tRCD): %d.%03dMinimum row precharge time (tRP): %d.%03dMinimum active to precharge time (tRAS): %d.%03dSupported timing at highest clock speed (%d MHz) : %d-%d-%d-%dMinimum Write Recovery time (tWR): %d.%03dSupported Write recovery: %sSupported Write latencies: %sSupported additive latencies: %sMinimum Active to Auto-Refresh Delay (tRC): %d.%03dMinimum Four Activate Window Delay (tFAW): %d.%03dPS1: UndefinedPS1: 1.8VPS1: 1.5VPS1: 1.2VPS1: TBD, PS2: UndefinedPS2: 1.8VPS2: 1.5VPS2: 1.2VPS2: TBDVoltage level: %s8 Burst Chop Burst lengths supported: %s150ohm ODT 75ohm ODT 50ohm ODT Terminations Supported: %sWeak driverDrivers supported: %sRequires double refresh rate for temperatures > 85C: %sHigh temperature self-refresh entry supported: %sMedium time base: Maximum module speed: %d MHz (PC3-%d)1.5V tolerant, 1.35V , 1.2X VOperable voltages: %sRZQ/6 supported: %sRZQ/7 supported: %sDLL-Off Mode supported: %sOperating temperature range: 0-%dCRefresh Rate in extended temp range: %dXAuto Self-Refresh: %sOn-Die Thermal Sensor readout: %sPartial Array Self-Refresh: %sThermal Sensor present: %s%02XStandard MonolithicSDRAM Device Type: %sModule Height (mm): %d - %dModule Thickness (mm): front %d-%d , back %d-%d 133.567.6TBDModule Width (mm): %sRaw Card ZZRaw Card %s Rev. %dModule reference card: %s# Registers: %d# DRAM Rows: %dHeat spreader solution incorporated: %sRegister Manufacturer: %s (Bank: %d, ID: 0x%02X)Register revision: 0x%02XSSTE32882Register type: %sCommand/Address A Outputs Drive Strength: %sCommand/Address B Outputs Drive Strength: %sControl Signals A Outputs Drive Strength: %sControl Signals B Outputs Drive Strength: %sY1/Y1# and Y3/Y3# Clock Outputs Drive Strength: %sY0/Y0# and Y2/Y2# Clock Outputs Drive Strength: %sXMP supported: YesXMP revision: %02X[XMP Profile %d] Enthusiast / Certified Profile enabled: %s[XMP Profile %d] recommended DIMMs per channel: %d[XMP Profile %d] Extreme Profile enabled: %s Medium time base: %d.%03d Voltage: %s Minimum SDRAM Cycle Time (tCKmin): %d.%03d Minimum CAS Latency Time (tAAmin): %d.%03d Supported CAS: %s Minimum CAS Write Latency Time (tCWLmin): %d.%03d Minimum Row Precharge Delay Time (tRPmin): %d.%03d Minimum RAS# to CAS# Delay Time (tRCDmin): %d.%03d Minimum Write Recovery Time (tWRmin): %d.%03d Minimum Active to Active/Refresh Delay Time (tRCmin): %d.%03d Minimum Active to Precharge Delay Time (tRASmin): %d.%03d Maximum tREFI Time (Average Periodic Refresh Interval): %d.%03d Minimum Refresh Recovery Delay Time (tRFCmin): %d.%03d Minimum Internal Read to Precharge Command Delay Time (tRTPmin): %d.%03d Minimum Row Active to Row Active Delay Time (tRRDmin): %d.%03d Minimum Four Activate Window Delay Time (tFAWmin): %d.%03d Minimum Internal Write to Read Command Delay Time (tWTRmin): %d.%03d Supported timing at highest clock speed (%d MHz) : %d-%d-%d-%dPush-outPush-in%d Clock %sNo adjustment Write to Read CMD Turn-around Time Optimizations: %s Read to Write CMD Turn-around Time Optimizations: %s Back 2 Back CMD Turn-around Time Optimizations: %s System CMD Rate Mode: %dNRevision Code: 0x%02XDRAM Stepping: 0x%02XSDRAM Package Type: %s, %d die, %sMaximum Activate Window (tMAW) in units of tREFI: %dMaximum Activate Count (MAC): %sPost Package Repair (PPR) supported: %sFine time base (ns): %d.%03dMinimum clock cycle time (ns): %d.%03dMaximum clock cycle time (ns): %d.%03dMaximum module speed: %d MHz (PC4-%d)Minimum Recovery Delay (tRFC2): %d.%03dMinimum Recovery Delay (tRFC4): %d.%03dMinimum Activate to Activate Delay Time, different bank group (tRRD_S): %d.%03dMinimum Activate to Activate Delay Time, same bank group (tRRD_L): %d.%03dMinimum CAS to CAS Delay Time, same bank group (tCCD_Lmin): %d.%03d1.2V1.2V tolerantTBD1 VTBD1 V tolerantTBD2 VTBD2 V tolerantBase Configuration Section CRC16: 0x%04XCKE Drive Strength: %sODT Drive Strength: %sCommand/Address Drive Strength: %sChip Select Drive Strength: %sY0/Y2 Output Drive Strength: %sY1/Y3 Output Drive Strength: %sData Buffer revision: 0x%02XData Buffer MDQ Drive Strength and RTT for data rate < 1866: (Drive Strength) %s, (RTT) %sDRAM Drive Strength for data rate < 1866: %sDRAM ODT for data rate < 1866: (RTT_NOM) %s, (RTT_WR) %s, (RTT_PARK Rank 0,1) %s, (RTT_PARK Rank 2,3) %sData Buffer MDQ Drive Strength and RTT for 1866 < data rate <= 2400: (Drive Strength) %s, (RTT) %sDRAM Drive Strength for 1866 < data rate <= 2400: %sDRAM ODT for 1866 < data rate <= 2400: (RTT_NOM) %s, (RTT_WR) %s, (RTT_PARK Rank 0,1) %s, (RTT_PARK Rank 2,3) %sData Buffer MDQ Drive Strength and RTT for 2400 < data rate <= 3200: (Drive Strength) %s, (RTT) %sDRAM Drive Strength for 2400 < data rate <= 3200: %sDRAM ODT for 2400 < data rate <= 3200: (RTT_NOM) %s, (RTT_WR) %s, (RTT_PARK Rank 0,1) %s, (RTT_PARK Rank 2,3) %sModule Specific Section CRC16: 0x%04X Fine time base: %d.%03d Minimum Refresh Recovery Delay Time (tRFC1min): %d.%03d Minimum Refresh Recovery Delay Time (tRFC2min): %d.%03d Minimum Refresh Recovery Delay Time (tRFC4min): %d.%03d Minimum Activate to Activate Delay Time, different bank group (tRRD_S): %d.%03d Minimum Activate to Activate Delay Time, same bank group (tRRD_L): %d.%03dGet PCI 0x%x, 0x%x, 0x%x, 0x%x [%u:%u]: %d (%u)Get PCI failed 0x%x, 0x%x, 0x%x, 0x%x [%u:%u]: %d (%u)DEBUG: Get_AMD_12_14_CurTmp raw:%u AMD Reported Temperature Control: 0x%X, %d, %dIntel82371AB/EB (PIIX4)82443MX Mobile (PIIX4)82801AA/ICH82801AB/ICH082801BA/ICH282801BA/BAM ICH2/2-M82801CA/CAM ICH382801DB ICH482801EB/ER ICH5/5R6300ESBEnterprise Southbridge - ESB282801FB/FR/FBM ICH6/6R/6-M82801G ICH782801H ICH8ICH95100TolapaiGPIO Base Address=%08XGPIO Control Register=%08XGPIO disabled. Enabling...GPIO registers lockdown enabled. Disabling...ICH103400/5 Series (PCH)Cougar Point (PCH)Patsburg (PCH)E5 chipset found: SMB_STAT[0]=%08XMMCFGBase=%08X MMCFGLimit=%08XSMBUS MMIO address=%08XSMB_STAT[0]=%08XSandy Bridge-E (IMC)E5v2 IMC %d found: SMB_STAT[0]=%08XIvy Bridge-E (IMC %d)Patsburg (PCH) IDF8 Series/C220 Series (Lynx Point) (PCH)9 Series (PCH)Wellsburg (PCH)E5v3 IMC %d found: SMB_STAT[0]=%08XHaswell-E (IMC %d)Lynx Point-LP (PCH)Wildcat Point-LP (PCH)DH89xxCC (PCH)Panther Point (PCH)AvotonValleyViewSunrise Point-HBroadwell IMC found: SMB_STAT[0]=%08XBroadwellnVidianForce2 SMBus (MCP)nForce2 Ultra 400 SMBus (MCP)nForce3 Pro150 SMBus (MCP)nForce3 250Gb SMBus (MCP)nForce4 SMBus (MCP)nForce4 SMBus (MCP-04)nForce SMBus (MCP51)nForce SMBus (MCP55)nForce SMBus (MCP61)nForce SMBus (MCP65)nForce SMBus (MCP67)nForce SMBus (MCP73)nForce SMBus (MCP78S)nForce SMBus (MCP79)nForce SMBus (MCP89)ATISMBusIXP SB400 SMBus ControllerSB800 SMBusSB600/SB700 SMBusAMDAMD-756 Athlon ACPIAMD-766 Athlon ACPIAMD-768 System ManagementAMD-8111 ACPIHudson-2 SMBusHudson-3 SMBusVIAVT82C596 Apollo ACPIVT82C596B ACPIVT82C686 Apollo ACPIVT8233 VLink South BridgeVT8233A South BridgeVT8233A/8235 South BridgeVT8237 South BridgeVT8237A South BridgeVT8237S South BridgeVT8231 South BridgeVT8251 South BridgeCX700 South BridgeVX800/VX820 South BridgeVX855/VX875 South BridgeVX900 South BridgeSISSIS96X SMBus ControllerSIS968 SMBus ControllerSiS964 detected. ACPIBase=%04X SMBBase=%04XSIS964 SMBus ControllerALIAcer Labs 1563Found device with SMBUS class code.Enable_PCI_SIS96X_SMBus 0x%x, 0x%x, 0x%x, 0x%xEnable_PCI_SIS96X_SMBus Result=0x%08XEnable_PCI_SIS964_SMBus 0x%x, 0x%x, 0x%x, 0x%xEnable_PCI_SIS964_SMBus Result=0x%08XSearching PCI for SMBus ControllerScanning PCI for devices:Attemping to enable SMBUS: Found SMBus device: VID:%.4X DID:%.4X Bus:%.2X Dev:%.2X Fun:%.2X IO Add:%.4X IO (2) Add:%.4X MMIO Add:%p PCI Add:{%02X:%02X:%02X:%04X} Rev:%.2X [%s %s] Found SMBus device: VID:%.4X DID:%.4X Bus:%.2X Dev:%.2X Fun:%.2X IO Add:%.4X IO (2) Add:%.4X MMIO Add:%p PCI Add:{%02X:%02X:%02X:%04X} Rev:%.2X SMBus address invalid! VID:%.4X DID:%.4X Bus:%.2X Dev:%.2X Fun:%.2X IO Add:%.4X IO (2) Add:%.4X MMIO Add:%p PCI Add:{%02X:%02X:%02X:%04X} Rev:%.2X [%s %s] VID:%.4X DID:%.4X Bus:%.2X Dev:%.2X Fun:%.2X IO Add:%.4X IO (2) Add:%.4X MMIO Add:%p PCI Add:{%02X:%02X:%02X:%04X} Rev:%.2XFinished searching PCI for SMBus ControllerRCBA Register: %08XFunction Disable Register MMIO Addr: %08XFunction Disable Register Value: %08XSMBUS controller is disabled. Enabling...Enabling complete. New Function Disable Register Value: %08XAMD K10AMD K8Intel Broadwell-DE (IMC 1)Intel Haswell-E (IMC 1)Intel Broadwell-DE (IMC 0)Intel Haswell-E (IMC 0)Intel Ivy Bridge-E (IMC 1)Intel Ivy Bridge-E (IMC 0)Intel Sandy Bridge-EIntel Broadwell-HIntel Atom E3800 SoC Transaction RouterIntel UL11L/US15LIntel US15WIntel EP80579Intel 7300Intel 5100Intel 5000VIntel 5000ZIntel 5000PIntel 5000XIntel 5400BIntel 5400AIntel 5400Intel G41Intel P45/G45Intel Q45/Q43Intel 3200/3210Intel X38/X48Intel Q33Intel P35/G33Intel Q35Intel PM/GM45/47Intel GME965/GLE960Intel GM965/GL960Intel P965/G965Intel Q963/Q965Intel i946PL/GZIntel i975XIntel i3000Intel i955XIntel i945GMEIntel i945GM/PMIntel i945P/GIntel i925X/XEIntel i915PM/GMIntel i915P/GIntel i855PMIntel Intel E7505Intel i875PIntel i848/i865Intel E8500Intel 3100Intel E7525Intel E7520Intel E7221Intel E7320Intel E7205Intel E7501Intel E7500Intel i450GXIntel i440GXIntel i440BXIntel i440[LE]XIntel i810EIntel i810Intel i430TXIntel i430VXIntel i860Intel i850Intel i820Intel i845E/G/PE/GEIntel i845Intel i840Intel i430HXIntel i440FXIntel i430MXIntel i430FXIntel i815CNB20LECNB20HEVIA PT880VIA PT800VIA CLE266VIA KN266VIA KM266VIA KM400VIA KT880VIA KT400(A)/600VIA KT266(A)/KT333VIA PLE133VIA Apollo Pro+VIA Apollo Pro/133/133AVIA MVP3VIA VP3VIA VP2VIA VP/VPXVIA MVP4VIA KX133VIA KT133/KT133AnForce4 SLI Intel EditionnVidia nForce2 SPPnVidia nForceATi Radeon Xpress 200ATi Radeon 9100 IGPALi Aladdin M1644ALi Aladdin 5ALi Aladdin 4SiS 672SiS 671SiS 661SiS 649SiS 648SiS 656SiS 655SiS 748SiS 745SiS 740SiS 735SiS 730SiS 651SiS 650SiS 630SiS 645DXSiS 645SiS 5600SiS 620SiS 600AMD 761AMD 762AMD 751(Unknown)Intel Nehalem/Lynnfield/Westmere chipset initNehalem MC_STATUS=%08xNehalem MC_SSRCONTROL=%08xNehalem MC8_STATUS=%016xNehalem MC8_ADDR=%016xNehalem MC8_MISC=%016xNehalem MC_CHANNEL_0_ADDR_MATCH=%016xNehalem MC_CHANNEL_0_ECC_ERROR_MASK=%08xNehalem MC_CHANNEL_0_ECC_ERROR_INJECT=%08xIntel E5 Sandy Bridge chipset initSB-E MCMTR=%08xSB-E SCRUBCTL=%08xSB-E MMCFGBase=%08x, MMCFGLim=%08x[Channel %d] CORRERRCNT_%d=%08x, CORRERRTHRSHLD_%d=%08xSB-E MCG_CAP=%016lx, MCG_STATUS=%016lx, ERROR_CONTROL=%016lxSB-E MC%d_STATUS=%016lx[Channel %d, Slot %d] DIMM err count=%08xMC%d_STATUS=%016lx (Overflow=%s, Uncorrected=%s, Recoverable=%s, Corrected error count=%d, Error code=%04X)Transaction error type: Generic undefined request errorMemory read errorMemory write errorAddress/Command errorMemory scrubbing errorReserved**WARNING** Not memory controller errorModel specific error: Address parity errorHA Wrt buffer Data parity errorHA Wrt byte enable parity errorCorrected patrol scrub errorUncorrected patrol scrub errorCorrected spare errorUncorrected spare errorMC%d_ADDR=%016lxMC%d_MISC=%016lxIntel E5 Ivy Bridge chipset initIB-E MCMTR=%08xIB-E SCRUBCTL=%08xIB-E MMCFGBase=%08x, MMCFGLim=%08xIB-E MCG_CAP=%016lx, MCG_STATUS=%016lx, ERROR_CONTROL=%016lxIB-E MC%d_STATUS=%016lxiMC, WDB, parity errorsIntel E5 Haswell-E chipset initHaswell-E MCMTR=%08xHaswell-E SCRUBCTL=%08xHaswell-E MMCFGBase=%08x, MMCFGLim=%08xHaswell-E Found channels 2-3 at %d-%d-%dHaswell-E MCG_CAP=%016lx, MCG_STATUS=%016lxHaswell-E MC%d_STATUS=%016lxDDR3 Address parity errorUncorrected HA write data errorUncorrected HA data byte enable errorCorrected memory read errorDDR4 command address parity errorIntel Broadwell-DE chipset initBroadwell-DE MCMTR=%08xBroadwell-DE SCRUBCTL=%08xBroadwell-DE MMCFGBase=%08x, MMCFGLim=%08xAMD64 chipset initDRAM config low=%08xMCA NB config=%08xMCG_CTL low=%08xAMD 10h and greater chipset initNbMcaLogEn is disabled. Enabling...x8x4MCA Extended NB config=%08x [EccSymbolSize=%s]MC4_CTL=%016lxMC4_CTL_MASK=%016lxMCA NB Status High=%08x. Clearing previous error...MCA NB Status=%016lx MCA NB Address=%016lxinject_amd64 - new nb_arr_add = %08xinject_amd64 - new dram_ecc = %08xMCA NB Status High=%08xAMD 751 chipset initDRAM STATUS=%08xECC STATUS=%08xBANK INFO(%x)=%08xAMD 76x chipset initECC Mode Status=%08xCNB20 chipset initIntel 5400 chipset initMC=%08xFERR_FAT=%08xFERR_NF=%08xNERR_FAT=%08xNRECMEMA=%08XNRECMEMB=%08XNERR_NF=%08xRECMEMA=%08XRECMEMB=%08XREDMEMA=%08XREDMEMB=%08XVALIDLOG=%08xREDMEMA=%08xRECMEMA=%08xRECMEMB=%08xNRECMEMA=%08xNRECMEMB=%08xREDMEMB=%08xIntel E7xxx chipset initMCHCFGNS=%08xDRC=%08xDVNP=%08xE7520 chipset initMCHSCRB=%08xDVNP1=%08xFERR=%08xCELOG_ADD=%08xCELOG_SYNDROME=%08xUCELOG_ADD=%08xIntel 440GX chipset initNBXCFG=%08xERRSTS=%08xEAP=%08xIntel 840 chipset initMCHCFG=%08xDERRCTRL_STS=%08xIntel 875 chipset initBAR6=%08xIntel 925 chipset initMCHBAR=%08xTOLUD=%02xERRSTS=%04xDEAP=%08xDERRSYN=%02xDERRDST=%02xIntel 3000 chipset initIntel P35 chipset initCAPID0[1]=%08xIntel 3200 chipset initMCHBAR_LO=%08xMCHBAR_HI=%08xCAPID0[DUALCH]=%02xERRLOG[%d]=%16lxIntel X38 chipset (Intel 3200 equiv) initIntel E3 Sandy Bridge chipset initMCHBAR=%lxCAPID0_A=%08xERRCMD=%04xMAD_DIMM_ch0=%08x, MAD_DIMM_ch1=%08x[Channel %d] ERRLOG0=%08x, ERRLOG1=%08xinject_e3sb - capid0 = %08xlockedunlockedinject_e3sb - LT_LOCK_MEMORY = %016x (%s)inject_e3sb - MC Lock = %08x (%s)inject_e3sb - ECC Addr Comp = %08xinject_e3sb - ECC Addr Mask = %08xinject_e3sb - [Channel %d] ECC Inj count = %08xinject_e3sb - [Channel %d] eccdft = %08xinject_e3sb - [Channel %d] new eccdft = %08xIntel E3 Haswell-E chipset initERRLOG0[%d]=%16lxERRLOG1[%d]=%16lxinject_e3haswell - capid0 = %08xinject_e3haswell - ECC Addr Comp = %08xinject_e3haswell - ECC Addr Mask = %08xinject_e3haswell - [Channel %d] ECC Inj count = %08xinject_e3haswell - [Channel %d] eccdft = %08xinject_e3haswell - [Channel %d] new eccdft = %08xIntel Broadwell chipset initIntel Skylake chipset initINTRA_MAD_0=%08x, INTRA_MAD_1=%08xinject_skylake - capid0 = %08xinject_skylake - ECC Addr Comp = %08xinject_skylake - ECC Addr Mask = %08xinject_skylake - [Channel %d] ECC Inj count = %08xinject_skylake - [Channel %d] eccdft = %08xinject_skylake - [Channel %d] new eccdft = %08xERRSTS=%04XEAP=%08XDERRSYN=%02XDES=%02XIntel 845 chipset initDRC=%08XIntel 820 chipset initMCHCFG=%04XIntel 850 chipset initDERRCTRL_STS=%04XIntel 860 chipset initDERRCTL_STS=%04XDERRCTL_STS=%02XFERR=%04XNERR=%04XCELOG_ADD=%08XCELOG_SYNDROME=%04XUCCELOG_ADD=%08XIntel Atom E3800 chipset initDECCCTRL=%08X, DECCSBECNT=%08XNew DECCSBECNT=%08X[Channel 0] Single bit error count=%08xIntel Atom C2000 chipset init[Channel %d] DECCCTRL=%08X, DERRSTS=%08X, DERRMSKSEV=%08X[Channel %d] Clearing DERRSTS bits[Channel %d] New DERRSTS=%08X[Channel %d] Clearing MSK_SBE bit in DERRMSKSEV[Channel %d] New DERRMSKSEV=%08X[Channel %d] SBECNT%d=%08X[Channel %d] New SBECNT%d=%08XBECREG=%08XGCORERRSTS=%08X, GNERRSTS=%08X, GFERRSTS=%08XAtom C2000 MC5_CTRL=%016lxAtom C2000 MC5_STATUS=%016lx[Channel %d] Single bit error count=%08x[Channel %d] DERRSTS=%08X[Channel %d] SBELOG=%08X (Rank=%X Bank=%X Syndrome=%08X), SBEADDR=%08X[Channel %d] UCELOG=%08X (Rank=%X Bank=%X Syndrome=%08X), UCEADDR=%08XMC5_STATUS=%016lx (Overflow=%s, Uncorrected=%s, Corrected error count=%d, Error code=%04X)DDR3 Channel 0 Read ErrorDDR3 Channel 1 Read ErrorDDR3 Channel 0 Write ErrorDDR3 Channel 1 Write ErrorInternal Buffer RAM Read ErrorInternal Buffer RAM Write ErrorMC5_ADDR=%016lxinject_c2000atom - [Channel %d] DCO=%08X, ERRINJCTL=%08xinject_c2000atom - [Channel %d] setting new ERRINJCTL= %08xfind_mem_controller - found %a (%04X:%04X) at %d-%d-%dfind_mem_controller - Could not find controller, enumerating PCI bus...find_mem_controller - %a (%04X:%04X) at %d-%d-%dyesnofind_mem_controller - %a ECC mode: detect: %a, correct: %a, scrub: %a, chipkill: %aECC polling enabledECC polling disabledHP Hexa-CoreGX-412HC410 APU310 APUGX-424CCGX-212JCA10 Micro-6700TA4 Micro-6400TE1 Micro-6200TA8-6410A6-6310A4-6250JA4-6210E2-6110E1-6010X2150X1150GX-210JAGX-210HAGX-217GAGX-415GAGX-416RAGX-420CAA6-1450 APUA4-1250 APUA4-1200 APU3850 APU2650 APU5350 APU5150 APUA6-5A4-5E2-3E1-2RX-2RX-4FX-7600PA10-7400PA8-7200PFX-7500A10 Pro-7350BA10-7300A8 Pro-7150BA8-7100A6 Pro-7050BA6-7000X2 450X4 860KX4 840X4 850X4 870KA4 PRO-7350BA4 PRO-8350BA6 PRO-7400BA6 PRO-8550BA8 PRO-7600BA8 PRO-8650BA10 PRO-7800BA10 PRO-7850BA10 PRO-8750BA10 PRO-8850B7850B7800BA8-7600BA6-7400BA4-7300A6-7400KA6-8550KA8-7600A8-7650KA8-8650 A8-8650KA10-7700KA10-7800A10-7850KA10-7870KA10-8750 A10-8850KA10-5745M APUA8-5545M APUA6-5345M APUA4-5145M APUA10-5757M APUA10-5750M APUA8-5557M APUA8-5550M APUA6-5357M APUA6-5350M APUA4-5150M APUA10-6800BA10-6800KA10-6700 A10-6790KA10-6700TA8-6600KA8-6500BA8-6500 A8-6500TA6-6420BA6-6420KA6-6400BA6-6400KA4-7300 A4 PRO-7300BA4-6320 A4-6300BA4-6300 A4-4020 A4-4000 Athlon X4 760KAthlon X4 750Athlon X2 370KAthlon X2 350Sempron X2Athlon X2 340 Dual CoreA10-4657M APUAthlon X4 750K Quad CoreAthlon X4 740 Quad CoreR-464L APUR-460L APUR-460H APUR-452L APUR-272F APUR-268D APUR-260H APUR-252F APUA4-4355M APUA6-4455M APUA8-4555M APUA10-4655M APUA6-4300M APUA6-4400M APUA8-4500M APUA10-4600M APUA10-5800B APUA10-5800 APUA10-5800K APUA10-5700 APUA8-5600K APUA8-5500B APUA8-5500 APUA6-5400B APUA6-5400K APUA4-5300B APUA4-5300 APUFirePro A3Athlon X4Athlon X2Processor 63Processor 43Processor 33Opteron 63Opteron 43Opteron 33FX-43FX-83FX(tm)-8310FX-9590 Eight-CoreFX-9370 Eight-CoreFX-8300 Eight-CoreFX-8320 Eight-CoreFX-8350 Eight-CoreFX-6350 Six-CoreFX-6300 Six-CoreFX-4350 Quad-CoreFX-4300 Quad-CoreOpteron(tm) Processor 32Opteron(tm) Processor 62Opteron(TM) Processor 62Opteron(tm) Processor 42Opteron(tm) Processor 41FX-4200FX-4150FX-6130FX-B4150FX-4130FX(tm)-8140FX(tm)-6200FX(tm)-8170FX(tm)-8150FX(tm)-8120FX(tm)-8100FX(tm)-6120FX(tm)-6100FX(tm)-4170FX(tm)-4120FX(tm)-4100FX-8170FX-8150FX-8120FX-8100FX-6120FX-6100FX-4170FX-4120FX-4100AMD Z-60AMD C-70AMD C-60AMD C-50AMD C-30AMD Z-01AMD E2-2000 APUAMD E1-1500 APUAMD E2-1800 APUAMD E1-1200 APUAMD G-TAMD E-450AMD E-350AMD E-300AMD E-240A4-3330MX APUA8-3530MX APUA8-3520M APUA8-3510MX APUA8-3500M APUA8-3550MX APUA6-3430MX APUA6-3420M APUA6-3410MX APUA6-3400M APUA4-3320M APUA4-3310MX APUA4-3305M APUA4-3300M APUE2-3000M APUAMD A8-3870 APUAMD A8-3850 APUAMD A8-3820 APUAMD A8-3800 APUAMD A6-3670 APUAMD A6-3650 APUAMD A6-3620 APUAMD A6-3600 APUAMD A6-3500 APUAMD A6-3420 APUAMD A6-3400 APUAMD A4-3400 APUAMD A4-3300 APUAMD E2-3200 APUTurion Dual-Core ZM-8X2 Ultra Dual-Core Mobile ZM-8X2 Dual Core Mobile RM-7X2 Dual-Core Mobile RM-7Turion Dual-Core RM-7AMD Sempron(tm) SI-Athlon(tm)X2 DualCore QL-6Athlon(tm) X2 Dual-Core QL-6AMD Athlon Dual-Core QL-6AMD Athlon(tm) QI-46AMD Athlon (tm) QI-46AMD Six-Core ProcessorPhenom(tm) II X6Opteron(tm) Processor 61AMD OpteronSix-Core AMD Opteron(tm)AMD Turion(tm) II Neo NAMD Turion(tm) II Neo KAMD Athlon(tm) II N370Athlon(tm) II Neo KTurion(tm) II NTurion(tm) II Pn(tm) II Ultra Dual-Core Mobile MTurion(tm) II Dual-Core Mobile MAthlon(tm) II Dual-Core MAMD Sempron(tm) MSempron(tm) Processor 130AMD Sempron(tm) Processor 140Sempron(tm) Processor 140AMD Sempron(tm) X2 180AMD Athlon(tm) X2 4AMD Athlon(tm) X2 2Athlon(tm) II X2 4300eAthlon(tm) II X2 4400eAMD Athlon(tm) II X2 2Athlon(tm) II X4 6Athlon(tm) II X3 4Phenom(tm) II X4 B4Phenom II 42 TWKRPhenom(tm) II X4 BPhenom(tm) II X4 96Phenom(tm) II X4 95Phenom(tm) II X4 945Phenom(tm) II X4 940Phenom(tm) II X4 920Phenom(tm) II X4 910Phenom(tm) II X4 90Phenom(tm) II X4 8Phenom(tm) II X3 B77Phenom(tm) II X3 B75Phenom(tm) II X3 B73Phenom(tm) II X3 7Phenom(tm) II X2 5X2 Dual-Core Processor GP-773Phenom(tm) 7950 Quad-CoreAthlon(tm) 7850 Dual-CoreAthlon(tm) 7750 Dual-CoreAthlon(tm) 7550 Dual-CoreAthlon(tm) 7450 Dual-CoreAthlon(tm) 6500 Dual-CoreAMD Phenom(tm) 8X4 Quad-Core Processor GP-983X4 Quad-Core Processor GP-9AMD Phenom(tm) 9Opteron(tm) Processor 83Opteron(tm) Processor 23Opteron(tm) Processor 13Athlon(tm) 64 FX-74 ProcessorAthlon(tm) 64 FX-72 ProcessorAthlon(tm) 64 FX-70 ProcessorAthlon(tm) Neo Processor MV-40Sempron(tm) Processor LE-1Athlon(tm) Processor LE-16Athlon(tm) Processor 2650eAthlon(tm) Processor 1640BAMD Athlon(tm) 64 ProcessorAthlon(tm) Processor TF-20Sempron(tm) Processor 210USempron(tm) Processor 200UNeo X2 Dual Core Processor L625Neo X2 Dual Core Processor L335Sempron(tm) Dual Core Processor 4Sempron(tm) Dual Core Processor 2Athlon(tm) Dual Core Processor 5Athlon(tm) Dual Core Processor 4X2 Dual Core Processor BE-2AMD Turion(tm) 64 X2 TL-64 X2 Mobile Technology TL-64 X2 Dual Core Processor TKAthlon(tm) Processor LE-1640Athlon(tm) Processor LE-1620Athlon(tm) Processor LE-1600Turion 64 Mobile Technology MK-AMD Athlon(tm) 64 X2Opteron(tm) Processor 12Athlon(tm) 64 X2 Dual CoreAthlon(tm) 64 FX-62 Dual CoreOpteron(tm) Processor 82Opteron(tm) Processor 22AMD Opteron ProcessorMobile AMD SempronOpteron ProcessorTurion(tm) 64 MobileAthlon(tm)64 X2Athlon(tm) 64 X2Dual Core AMD Opteron(tm)Sempron(tm) Processor 3Mobile AMD Sempron(tm)Mobile AMD Athlon 64Athlon(tm) 64 Processor 3Sempron(tm) ProcessorAthlon(tm) 64 ProcessorAthlon(tm) 64 FXAthlon(tm) 64 FX-Opteron(tm) ProcessorMobile AMD Athlon(tm) 64AMD Athlon(tm) 64i3i5i7D-1540D-1520m3m5m7C2308C2338C2358C2508C2518C2538C2558C2718C2738C2758C2530C2550C2730C2750CPU N3N3150N3050N3000N3700-Z8x5-Z8300x5-Z8500x7-Z8700Xeoni7-4960HQi5-43i5-42i7-47i7-4500UPentium 3556UPentium 3560YCeleron 2981UCeleron 2980UCeleron 2957UCeleron 2955UE7-8E7-4i7-59i7-58E7-88E7-48E7-28CPU E26E5-46E5-26E5-16E5-24E5-14i7-48i7-493205U3755U3825U3805Ui3-5i5-5i7-55Y75Y55Y35Y15Y705Y102961Y2980U2981U2957U2955U3556U3558U3560Y3561Y2950M2970M3550M3560Mi3-4005Ui3-4025Ui3-4030Ui3-4012Yi3-4020Yi3-4030Yi3-4000Mi3-4010Ui3-4010Yi3-4110Mi3-4100Ei3-4102Ei3-4110Ei3-4112Ei3-4120Ui3-4100Mi3-4100Ui3-4158Ui5-4200Mi5-4200Ui5-4200Yi5-4200Hi5-4250Ui5-4258Ui5-4288Ui5-4202Yi5-4210Yi5-4210Ui5-4210Mi5-4210Hi5-4220Yi5-4260Ui5-4278Ui5-4300Ui5-4300Yi5-4302Yi5-4300Mi5-4308Ui5-4310Ui5-4310Mi5-4330Mi5-4340Mi5-4350Ui5-4360Ui5-4400Ei5-4402Ei5-4410Ei5-4422Ei5-4402ECi7-4510Ui7-4578Ui7-4600Ui7-4610Yi7-4550Ui7-4558Ui7-4600Mi7-4610Mi7-4650Ui7-4700ECi7-4700EQi7-4700HQi7-4700MQi7-4701EQi7-4702ECi7-4702MQi7-4702HQi7-4710HQi7-4710MQi7-4712HQi7-4712MQi7-4750HQi7-4760HQi7-4800MQi7-4810MQi7-4850HQi7-4850EQi7-4860HQi7-4860EQi7-4900MQi7-4910MQi7-4930MXi7-4940MXi7-4950HQG18G32G33G34i3-4130Ti3-4150Ti3-4130 i3-4150 i3-4160Ti3-4160 i3-4170Ti3-4170 i3-4330TEi3-4340TEi3-4330Ti3-4350Ti3-4330 i3-4340 i3-4350 i3-4360 i3-4360Ti3-4370 i3-4370Ti5-4430 i5-4430Si5-4440Si5-4460 i5-4440i5-4460Ti5-4460Si5-4570Si5-4570 i5-4570Ti5-4570TEi5-4590Ti5-4590Si5-4590 i5-4670 i5-4670Ki5-4670Si5-4670Ti5-4690Ti5-4690Si5-4690Ki5-4690 i7-4722HQi7-4720HQi7-4765Ti7-4770 i7-4770Ki7-4770Si7-4770Ti7-4770TEi7-4771 i7-4785Ti7-4790Ti7-4790Si7-4790Ki7-4790 E3-1226 v3E3-1241 v3E3-1246 v3E3-1271 v3E3-1275L v3E3-1276 v3E3-1281 v3E3-1284L v3E3-1286L v3E3-1286 v3E3-1220L v3E3-1220 v3E3-1225 v3E3-1230 v3E3-1231 v3E3-1230L v3E3-1240 v3E3-1245 v3E3-1265L v3E3-1268L v3E3-1270 v3E3-1275 v3E3-1280 v3E3-1285 v3E3-1285L v3i3-3i5-3i7-3i3-3110Mi5-3210Mi3-3317Ui3-3217Ui5-3320Mi5-3360Mi5-3317Ui5-3427Ui5-3437Ui7-3520Mi7-3517Ui7-3517UEi7-3540Mi7-3537Ui7-3555LEi7-3667Ui7-3687Ui7-3610QMi7-3610QEi7-3612QMi7-3612QEi7-3615QMi7-3615QEi7-3632QMi7-3720QMi7-3740QMi7-3820QMi7-3840QMi7-3920XMi7-3940XM2020M2030M2117U2127U2129YG21G201000M1005M1007U1017U1019Y1020E1020M1037U1047UE927UEG16i3-3225 i3-3220Ti3-3220 i3-3240 i5-3220 i5-3225 i5-3240 i5-3330Si5-3330 i5-3335Si5-3350Pi5-3450Si5-3450 i5-3470Ti5-3470Si5-3470 i5-3475Si5-3550Si5-3550 i5-3570Ti5-3570Si5-3570 i5-3570Ki7-3770Ti7-3770Si7-3770 i7-3770KE3-12E38Z36Z37Z379Z3680 Z3680DZ3740 Z3740DZ3745 Z3770 Z3770DZ3775 3736G3736F3735G3735FCPU N38CPU N35Celeron N2CPU N29N2910N2920N2930N2940CPU N28N2805N2806N2807N2808N2810N2815N2820N2830N2840Pentium(R) CPU N3Pentium N3CPU J1Celeron J1J1750J1800J1850J1900CPU J2Pentium J2J2850J2900Atom(TM) CPU NAtom(TM) CPU DAtom(TM) CPU Z2Xeon(R) CPU E7- 4E6E7X6X7CPU E5-12CPU E5-14CPU E5-16CPU E5-24CPU E5-26CPU E5-4i7-3960Xi7-3930Ki7-3820Xeon(R) CPU W56Xeon(R) CPU L56Xeon(R) CPU W36Xeon(R) CPU X56Xeon(R) CPU E56i7 CPU X 990i7 CPU X 980i7 CPU 980i7 CPU 970Xeon(R) CPU E5-46Xeon(R) CPU E546Xeon(R) CPU E526Xeon(R) CPU E5-24Xeon(R) CPU E524Xeon(R) CPU E5-26Xeon(R) CPU E5-16Xeon(R) CPU E51Pentium(R) CPU 3Pentium(R) CPU B9Pentium(R) CPU 9Celeron(R) CPU GCeleron(R) CPU B7Celeron(R) CPU B8Celeron(R) CPU 8i7-2600i7-2600Si7-2600 Pi7-2600Ki7-2700Ki7-2610UEi7-2655LEi7-2617Mi7-2657Mi7-2637Mi7-2677Mi7-2629Mi7-2649Mi7-2620Mi7-2640Mi7-2710QEi7-2715QEi7-2630QMi7-2635QMi7-2670QMi7-2675QMi7-2720QMi7-2760QMi7-2820QMi7-2840QMi7-2860QMi7-2960XMi7-2920XMi5-2300 Pi5-2310 Pi5-2320 Pi5-2380Pi5-2380 Pi5-2390Ti5-2450Pi5-2450 Pi5-2400Si5-2405Si5-2400 Pi5-2550 Pi5-2500Ti5-2500Si5-2500 Pi5-2500Ki5-2550Ki5-2515Ei5-2510Ei5-2410Mi5-2430Mi5-2435Mi5-2450Mi5-2520Mi5-2540Mi5-2467Mi5-2537Mi5-2557Mi3-2100 Pi3-2102 Pi3-2105 Pi3-2120 Pi3-2125 Pi3-2130 Pi3-2100Ti3-2120Ti3-2340UEi3-2310Ei3-2330Ei3-2377Mi3-2370Mi3-2357Mi3-2367Mi3-2310Mi3-2312Mi3-2328Mi3-2330Mi3-2350MAtom(TM) CPU Z6Atom(TM) CPU E680Atom(TM) CPU E680TCPU P6CPU U6Core(TM) i7 CPU E 6Core(TM) i7 CPU L 6Core(TM) i5 CPU U 4Core(TM) i5 CPU U 5Core(TM) i7 CPU U 6Core(TM) i3 CPU M 3Core(TM) i5 CPU M 4Core(TM) i5 CPU M 5Core(TM) i7 CPU MCore(TM) i5 CPU K 6Core(TM) i3 CPU 5Core(TM) i5 CPU 6Pentium(R) CPU GCore(TM) i7 CPU X 9Core(TM) i7 CPU Q 8Core(TM) i7 CPU Q 7Xeon(R) CPU X34Core(TM) i7 CPU K 8Core(TM) i5 CPU S 7Core(TM) i5 CPU 7Core(TM) CPU 7Core(TM) CPU 8Core(TM) i7 CPU 8Xeon(R) CPU E74Xeon(R) CPU L74Xeon(R) CPU X74Atom(TM) CPU D510Atom(TM) CPU N4Intel(R) Atom(TM) CPU Z5Intel(R) Atom(TM) CPU N280Intel(R) Core(TM) CPU N270Intel(R) Atom(TM) CPU N270Intel(R) CPU N270Intel(R) Atom(TM) CPU 330Intel(R) Atom(TM) CPU 230Intel(R) CPU 230Xeon(R) CPU W55Xeon(R) CPU X55Xeon(R) CPU L55Xeon(R) CPU E55Xeon(R) CPU W35Core(TM) i7 CPU 9Xeon(R) CPU E54Xeon(R) CPU L54Xeon(R) CPU L5408Xeon(R) CPU L5410Xeon(R) CPU L5420Xeon(R) CPU L5430Xeon(R) CPU X54Xeon(R) CPU L52Xeon(R) CPU E52Xeon(R) CPU E5205Xeon(R) CPU E5220Xeon(R) CPU E5240Xeon(R) CPU E5200Xeon(R) CPU L5215Xeon(R) CPU L5238Xeon(R) CPU L5240Xeon(R) CPU X52Xeon(R) CPU L33Xeon(R) CPU X33Xeon(R) CPU E31Xeon(R) CPU L3014Core(TM)2 Quad CPU Q9650Core(TM)2 Quad CPU Q9505Core(TM)2 Quad CPU Q9550Core(TM)2 Quad CPU Q9450Core(TM)2 Quad CPU Q9400Core(TM)2 Quad CPU Q9300Core(TM)2 Quad CPU Q9200Core(TM)2 Quad CPU Q9100Core(TM)2 Quad CPU Q9000Core(TM)2 Quad CPU Q8Core(TM)2 Extreme CPU X9000Core(TM)2 Extreme CPU X9100Core(TM)2 Extreme CPU Q9300Core(TM)2 Extreme CPU X9650Core(TM)2 Extreme CPU X9770Core(TM)2 Extreme CPU X9775Core(TM)2 Solo CPU U3Core(TM)2 Duo CPU U9600Core(TM)2 Duo CPU U9400Core(TM)2 Duo CPU U9300Core(TM)2 Duo CPU T9Core(TM)2 Duo CPU T8Core(TM)2 Duo CPU T6Core(TM)2 CPU T6Core(TM)2 Duo CPU P9600 @ 2.53Core(TM)2 Duo CPU P9400 @ 2.40Core(TM)2 Duo CPU P9300 @ 2.26Core(TM)2 Duo CPU P9700Core(TM)2 Duo CPU P9600 @ 2.66Core(TM)2 Duo CPU P9500Core(TM)2 Duo CPU P8Core(TM)2 Duo CPU P7Core(TM)2 Duo CPU L9Core(TM)2 CPU E8Core(TM)2 CPU E7Core(TM)2 Duo CPU E8Core(TM)2 Duo CPU E7Celeron(R) Dual-Core CPU T3300Celeron(R) Dual-Core CPU T3100Celeron(R) Dual-Core CPU T3000Pentium(R) Dual-Core CPU TCeleron(R) CPU 900Celeron(R) CPU 7Intel(R) Celeron(R) CPU E3Pentium(R) CPU EPentium(R) Dual-Core CPU ECore(TM)2 Solo CPU U2Celeron(R) M CPU 5Celeron(R) CPU 570Celeron(R) CPU 560Celeron(R) CPU 550Celeron(R) CPU 540Celeron(R) CPU 530Celeron(R) D CPU 4Celeron(R) D CPU 2Celeron(R) CPU 4Celeron(R) CPU 2Xeon(R) CPU L73Xeon(R) CPU L5310Xeon(R) CPU L5318Xeon(R) CPU L5320Xeon(R) CPU L5335Xeon(R) CPU X73Xeon(R) CPU X5355Xeon(R) CPU X5365Xeon(R) CPU X32Xeon(R) CPU E73Xeon(R) CPU E7220Xeon(R) CPU E7210Xeon(R) CPU E5310Xeon(R) CPU E5320Xeon(R) CPU E5335Xeon(R) CPU E5345Xeon(R) CPU 5110Xeon(R) CPU 5120Xeon(R) CPU 5130Xeon(R) CPU 5140Xeon(R) CPU 5150Xeon(R) CPU 5160Xeon(R) CPU 5128Xeon(R) CPU 5138Xeon(R) CPU 5148Xeon(R) CPU 3040Xeon(R) CPU 3050Xeon(R) CPU 3060Xeon(R) CPU 3065Xeon(R) CPU 3070Core(TM)2 Extreme CPU Q6Core(TM)2 Extreme CPU Q68Core(TM)2 Quad CPU @ 2.93GHzCore(TM)2 Quad CPU @ 2.66GHzCore(TM)2 Quad CPU Q6Core(TM)2 Extreme CPU X7Core(TM)2 Duo CPU L7700Core(TM)2 Duo CPU L7500Core(TM)2 Duo CPU L7400Core(TM)2 Duo CPU L7300Core(TM)2 Duo CPU L7200Core(TM)2 Duo CPU L7100Core(TM)2 CPU X6Core(TM)2 Duo CPU U7Core(TM)2 CPU U7Core(TM)2 CPU T7200Core(TM)2 CPU T7400Core(TM)2 CPU T7600Core(TM)2 Duo CPU T7100Core(TM)2 Duo CPU T7250Core(TM)2 Duo CPU T7300Core(TM)2 Duo CPU T7500Core(TM)2 Duo CPU T7700Core(TM)2 Duo CPU T7800Core(TM)2 Duo CPU T5900Core(TM)2 Duo CPU T5870Core(TM)2 Duo CPU T5850Core(TM)2 Duo CPU T5800Core(TM)2 Duo CPU T5750Core(TM)2 Duo CPU T5670Core(TM)2 Duo CPU T5550Core(TM)2 Duo CPU T5470Core(TM)2 Duo CPU T5450Core(TM)2 Duo CPU T5270Core(TM)2 Duo CPU T5250Core(TM)2 CPU T5200Core(TM)2 CPU T5300Core(TM)2 CPU T5500Core(TM)2 CPU T5600Core(TM)2 CPU 6Core(TM)2 CPU 4Core(TM)2 Duo CPU E6Core(TM)2 Duo CPU E4Intel(R) Celeron(R) CPU E1Intel(R) CPU T1Intel(R) CPU 585Intel(R) CPU 575Celeron(R) M CPU 53Celeron(R) M CPU 52Pentium(R) Dual CPU TPentium(R) Dual CPU E2Genuine Intel(R) CPU 2Intel(R) CPU U1Core(TM) Duo CPU U2Core(TM) Duo CPU L2Intel(R) CPU T1400Intel(R) CPU T1350Intel(R) CPU T1300Intel(R) CPU T1200Celeron(R) M CPU 443Celeron(R) M CPU 423Celeron(R) M CPU 450Celeron(R) M CPU 440Celeron(R) M CPU 430Celeron(R) M CPU 420Celeron(R) M CPU 410Pentium(R) Dual CPU T2Pentium(R) Dual CPU T2700Pentium(R) Dual CPU T2600Pentium(R) Dual CPU T2500Pentium(R) Dual CPU T2400Pentium(R) Dual CPU T2300Genuine Intel(R) CPU T2GetCPUTemp - CPU Unsupported (Vendor ID: %a %x %x %x)GetIntelCPUTemps - Could not switch BSP to Proc#%d (%r)GetIntelCPUTemps - Could not switch BSP back to Proc#%dGetAMDCPUTemps - Could not switch BSP to Proc#%d (%r)GetAMDCPUTemps - Unsupported AMD CPU (Vendor ID: %a %x %x %x)GetAMDCPUTemps - Could not switch BSP back to Proc#%dGetIA32ArchitecturalTemp - ACPI not supportedGetIA32ArchitecturalTemp - MSR(0x19C) = %16lx (Vendor ID: %a %x %x %x)GetIA32ArchitecturalTemp - CPU temperature reading invalidGetIA32ArchitecturalTemp - Intel CPU not supported (Vendor ID: %a %x %x %x)MapTempIntel - MSR(0x1A2) = %16lxMapTempIntel - TJunction = %dCPU specification: partial match found (CPU: %a %x %x %x)CPU specification: exact match not found (Vendor ID: %a %x %x %x)CPU specification: partial match foundGetAMD15Temp - Temperature: %dGetAMD14Temp - Temperature: %dGetAMD12Temp - Temperature: %dGetAMD11Temp - Temperature: %dGetAMD10Temp - Temperature: %dSMBIOS: Found SMBIOS BaseboardInformation (pbLinAddr=0x%p, FormattedLen=%d, iTotalLen=%d)DEBUG: Get SMB mem device Struct %dDEBUG: Get SMB mem device Struct Get strings (FormattedLen=%d, iTotalLen=%x)GetXeonBroadwellEFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetXeonBroadwellEFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetXeonBroadwellEFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetSkylakeFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetSkylakeFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetSkylakeFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetKnightsLandingFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetKnightsLandingFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetKnightsLandingFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetNextGenerationXeonHaswellFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetNextGenerationXeonHaswellFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetNextGenerationXeonHaswellFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetBroadwellFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetBroadwellFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetBroadwellFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetAirmontFamilyMSRInfo_Dynamic - MSR[0xCD] = %016lxGetAirmontFamilyMSRInfo_Dynamic - MSR[0x2A] = %016lxGetSilvermontFamilyMSRInfo_Dynamic - MSR[0xCD] = %016lxGetSilvermontFamilyMSRInfo_Dynamic - MSR[0x2A] = %016lxGetSilvermontFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetSilvermontFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetSilvermontFamilyMSRInfo_Static - MSR[0x66C] = %016lxGetSilvermontFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetHaswellFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetHaswellFamilyMSRInfo_Static - ExternalClock = %dGetHaswellFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetHaswellFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetIvyBridgeEPFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetIvyBridgeEPFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetIvyBridgeFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetIvyBridgeFamilyMSRInfo_Static - ExternalClock = %dGetIvyBridgeFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetIvyBridgeFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetXeonE7FamilyMSRInfo_Static - MSR[0xCE] = %016lxGetXeonE7FamilyMSRInfo_Static - ExternalClock = %dGetXeonE7FamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetSandyBridgeFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetSandyBridgeFamilyMSRInfo_Static - ExternalClock = %dGetSandyBridgeFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetSandyBridgeFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetWestmereFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetWestmereFamilyMSRInfo_Static - ExternalClock = %dGetWestmereFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetWestmereFamilyMSRInfo_Static - MSR[0x1AC] = %016lxGetWestmereFamilyMSRInfo_Static - MSR[0x1AD] = %016lxGetNehalemFamilyMSRInfo_Static - MSR[0xCE] = %016lxGetNehalemFamilyMSRInfo_Static - ExternalClock = %dGetNehalemFamilyMSRInfo_Static - MSR[0x1A2] = %016lxGetNehalemFamilyMSRInfo_Static - MSR[0x1AC] = %016lxGetNehalemFamilyMSRInfo_Static - MSR[0x1AD] = %016lxXEONIsDisableIntelTurboSupported - not supportedIsIntelTurboSupported - CPUID[0x6][EAX] = %08xDisableTurboMode - MSR[%x] = %016lxDisableTurboMode - New MSR[%x] = %016lxDisable Turbo mode failed: already disabled: %016lxEnableTurboMode - MSR[%x] = %016lxEnableTurboMode - New MSR[%x] = %016lxEnable Turbo mode failed: already enabled: %016lxEnableTurboMode - MSR[0x198] = %016lx (Current multiplier: %d)EnableTurboMode - MSR[0x199] = %016lx (Target multiplier: %d, Max1CTurbo: %d)EnableTurboMode - Setting MSR[0x199] to %016lxEnableTurboMode - New MSR[0x199] = %016lx (Target multiplier: %d)GetAtomFamilyMSRInfo_Dynamic - MSR[0xCD] = %016lxGetAtomFamilyMSRInfo_Dynamic - MSR[0x2A] = %016lxGetCore2FamilyMSRInfo_Dynamic - MSR[0xCD] = %016lxGetCore2FamilyMSRInfo_Dynamic - MSR[0x2A] = %016lxGetCore2FamilyMSRInfo_Dynamic - MSR[0x198] = %016lxGetCore2FamilyMSRInfo_Dynamic - TSCMultiplier = %dGetCore2FamilyMSRInfo_Dynamic - CurrentMultiplier = %dGetCoreSoloDuoMSRInfo_Dynamic - MSR[0xCD] = %016lxGetCoreSoloDuoMSRInfo_Dynamic - MSR[0x2A] = %016lxGetNetBurstFamilyMSRInfo_Dynamic - MSR[0x2C] = %016lxGetAMDFamilyMSRInfo - MSR Max Pstates/#boosted states: %d, %dGetAMDFamilyMSRInfo - MSR[0xC0010071] = %016lxGetAMDFamilyMSRInfo - MSR[%x] = %016lxGetAMDFamilyMSRInfo - Multiplier_P[%d] = %dGetAMDFamilyMSRInfo - APERF = %d, MPERF = %d, Mult = %dGetAMDFamilyMSRInfo - BaseClock = %dGetAMDFamilyMSRInfo - Turbo Core supportedGetAMDFamilyMSRInfo - (CPB disabled) APERF = %d, MPERF = %d, Mult = %dGetAMDFamilyMSRInfo - (CPB disabled) BaseClock = %dGetAMDFamilyMSRInfo - CPUSpeedTurboTheoreticalMax = %dGetAMDFamilyMSRInfo - MSR[0xC0010061] = %016lxGetAMDFamilyMSRInfo - (Before sanity check) Freq: %d, %d, %d, Turbo: %d, %d, %d (%d)GetAMDFamilyMSRInfo - Freq: %d, %d, %d, Turbo: %d, %d, %d (%d)IsAMDTurboCoreSupported - CPUID[0x80000007][EDX] = %08xGetAMDMult - CPUDid_P = %d, CPUFid_P = %dDisableAMDCPB - MSR[0xC0010015] = %016lxDisableAMDCPB - New MSR[0xC0010015] = %016lxGet_MPERF_APERF - CPUID[0x6][ECX] = %08xGet_MPERF_APERF - high perf counter freq = %ldGet_MPERF_APERF - Multiplier = %dGet_MPERF_APERF - time in ns = %ldGet_MPERF_APERF - FreqMPERF in KHz = %d, FreqAPERF in KHz = %dZbit Semiconductor, Inc.Bretelon Inc.Foxtronn International CorporationVitesse Enterprise Co.EpicGearAudience Inc.EVGAHGSTSocionext Inc.Indie SemiconductorEtron Technology, Inc.Douqi TechnologyAP MemoryINVECAS, Inc.Accelerated Memory Production Inc.HeoriadyEyenix Co., Ltd.Cal-Comp Industria de SemicondutoresVasekeyShenzhen Pango Microsystems Co. LtdCognimem Technologies, Inc.Compound PhotonicsShenzhen Zhongteng Electronic Corp. Ltd.LenovoNeotionTLiV2 TechnologiesGigacom Semiconductor LLCHong Kong Gaia Group Co. LimitedSeagate Technology PLCTekism Co. Ltd.Core Chance Co. Ltd.Skymedi CorporationUniquify Inc.KusoCusoUnimemory Technology(s) Pte Ltd.Hong Kong Zetta Device TechnologyGCT Semiconductor Inc.JoneFlash ChiMultilaser ComponentsXiedeSilicon Integrated Systems CorporationNemostech Inc.Baikal ElectronicsRelChip, Inc.Ikegami Tsushinki Co Ltd.Korea Uhbele International Group Ltd.NuvotonAncore Technology CorporationTechcomp International (Fastable)Keysight TechnologiesHIMA Paul Hildebrandt GmbH Co KGLeahkinn Technology LimitedDasima International DevelopmentGoogle, Inc.ISSI/ChingisShenzhen Elicks TechnologyHighXTSP Global Co., Ltd.ADK Media GroupStack Devices CorporationShenzhen City Gcai ElectronicsButterfly Network, Inc.InfomaxeveRAM Technology, Inc.Ambiq MicroXi an SinoChip SemiconductorPhytiumISD Technology LimitedAxell CorporationApproved Memory CorporationSmart Energy InstrumentsLabGloway International Co. Ltd.Galaxy Microsystems Ltd.Satixfy Ltd.ExelisEricsson ModemsFremont Micro Devices Ltd.Gowin Semiconductor CorpFROM30 Co. Ltd.King KongAnuragSilicon Motion Inc.SCWWShenzhen Jinge Information Co. Ltd.GE Intelligent Platforms GmbH & Co.Sonics, Inc.Mercury SystemsDiehl Aerospace3D PLUSIntelligence Silicon TechnologyPositivo BGHHermes Testing Solutions, Inc.Gowe Technology Co. Ltd.Idea! Electronic SystemsAcSiP Technology CorporationAnnapurna LabsACPI Digital Co. Ltd.GLOBALFOUNDRIESBittWare, Inc.HMicroInuitiveLITE-ON IT CorporationSilicon Space TechnologyPanram International CorporationZentel Electronics CorporationToumaz GroupSmart Storage SystemsHon-Hai PrecisionEverspin TechnologiesTranscend Technology Co. Ltd.High Bridge Solutions IndustriKingboMars Technology Co. Ltd.R&D Center ELVEES OJSCAvalanche TechnologyShark GamingWelink Solution Inc.OCMEMORYVisiontek Products LLCASSIA, Inc.Berg Microelectronics Inc.HarmanAAIWilk Elektronik S.A.Uroad Technology Co. Ltd.Baysand Inc.Bestdon Technology Co. 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Ltd. (Paion)Rockwell CollinseWave SystemNazomi CommunicationsSwissbitCambridge Silicon RadiotakeMS International AGPijnenburg SecurealinkJade Star TechnologiesSilverback SystemsPicochip Designs LtdPrimarionIceFyre SemiconductorTerawave CommunicationsValence SemiconductorIntrinsityMassana DesignPLX TechnologyCavium NetworksHypertecempowerTel NetworksRitek CorpInfrant TechnologiesCorrentINDUSYS GmbHImprov SystemsSatron HandelsgesSemicon Devices SingaporeSimtekViasystems GroupSilicon PacketsSanera Systemsc t Magazine3DlabsSILCOMConcept ComputerEquator TechnologyTachys TechnologiesResonext CommunicationsFirecron LtdBay MicrosystemsAPI NetWorksTekmosDibcomAzanda Network DevicesAstute NetworksMemory Experts IntlAmple CommunicationsOnex CommunicationsDelta ElectronicsTrebia NetworksPurple RayProcket NetworkseMemory TechnologyBitBlitz CommunicationsFlasysBOPSKingmax SemiconductorQuicklogicAcorn NetworksChipWrightsProgrammable Silicon SolutionsF5 NetworksAspex TechnologyChipcon ASCogency SemiconductorZettacomMagis WorksTyco ElectronicsCenton ElectronicsCicada SemiconductorTeraLogicNetlistTioga TechnologiesMushkinGolden EmpireAuroraNeticsNeoMagicAgere SystemsATI TechnologiesLightSand CommunicationsMysticomElite Flash StorageNanya TechnologyPrinceton TechnologyIkanos CommunicationsTerago CommunicationsOptillionGlobal LocateCyan TechnologiesTriMedia TechnologiesBuffalo (Formerly Melco)Optosys TechnologiesSolectronMDT Technologies GmbHAnadigm (Anadyne)ElementBenchmark Elect. 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GoreVLSIVitesseVisicVirata CorporationViking ComponentsVideoLogicVantisVanguardV3 SemiconductorUTMCUniv. of NCUnited Microelec CorpUnigen CorporationTundra SemiconductorTRWTruevisionTristarTriscendTranswitchTransmetaTranscend InformationTower SemiconductorToshibaThomson CSFThinking MachineThesysTexas InstrumentsTenx TechnologiesTelocityTellabsTektronixTECMARTCSITanisys TechnologyTandemTezzaron SemiconductorT SquareSynertekSymagery MicrosystemsSwitchOn NetworksSwitchcoreSuwa ElectronicsSuper PC MemorySunDiskSun MicrosystemsSSTSSSISpecTek IncorporatedSpaSESouthland MicrosystemsSonySolbourne ComputerSmart ModularSkyup TechnologySilicon WaveSilicon SpiceSilicon LaboratoriesSilicon Access NetworksSiemens AGSibyte, IncorporatedSiberCore TechnologiesShikatronicsSharpSTMicroelectronicsSeiko InstrumentsSeiko EpsonSeeqSCISarnoff CorporationSanyoSanmina CorporationSandCraftSamsungSaifun SemiconductorsRohm Company Ltd.Robert BoschRicoh Ltd.RF Micro DevicesRE-M SolutionsRealchipRCARaytheonRamtronQUALCOMMQuadratics SuperconductorQlogicPyconProtocol EnginesProMos/Mosel VitelicProgrammable Micro CorpPrice PointPQuality SemiconductorPower GeneralPNY Technologies, Inc.PMC-SierraPlus LogicPhobos CorporationPhilips Semi.Performance Semi.Peregrine SemiconductorPanasonicOmnivisionOKI SemiconductorOCZOasis SemiconductorNovatel WirelessNovanet SemiconductorNorthern TelecomNordic VLSI ASANippon Steel Semi. Corp.Nimbus TechnologyNEXCOMNewport DigitalNewport CommunicationsNew MediaNetLogic MicrosystemsNERA ASANECnCUBENCRNchipNational InstrumentsNationalMusic SemiMultiLink TechnologyMulti Dimensional Cons.MSC VertriebsmRadiataMostekMOSAID TechnologiesMorphics TechnologyMonolithic MemoriesMMC NetworksMitsubishiMIPS TechnologiesMIMOS SemiconductorMicronasMicron TechnologyMicron CMSMicrochipTechnologyMicro Memory BankMicro LinearMHS ElectronicMGV MemoryMetaLink TechnologiesMemory Card TechnologyMellanox TechnologiesMegicMedia VisionMCI Computer GMBHMaxim Integrated ProductMalleable TechnologiesmAlign ManufacturingMalaysia Micro SolutionsMacronixLucentLSI LogicLoralLinvex TechnologyLightSpeed Semi.Libit Signal ProcessingLG SemiLevel OneLegerityLegendLeCroyLattice Semi.Lara TechnologyLanstar SemiconductorKlicKingstonKentron TechnologiesKendin CommunicationsKawasaki SteelJuniper NetworksJTAG TechnologiesJasmine NetworksItec MemoryItautec Philco SAISOA IncorporatedIshoni NetworksIntl. CMOS TechnologyIntg. Silicon SolutionsIntersilIntellitech CorporationIntegrated Technology ExpressIntegrated Memory SystemIntegrated CMOS (Vertex)Integ. Memories Tech.Inova Semiconductors GmbHInmosInfineonILC Data DeviceIDTIBMI3 Design SystemI.T.T.I & C TechnologyHyundai ElectronicsHYPERTECHyperchipHughes AircraftHoneywellHitachiHiNT CorporationHigh Bandwidth AccessHi/fnHewlett-PackardHelix AGHarrisHanBit ElectronicsHal ComputersHagiwara Sys-ComHADCO CorporationGTEGSI TechnologyGreat Technology MicrocomputerGraychipGoldenramGlobeSpanGENNUMGemstone CommunicationsGateFieldGalvantechGalileo TechGalaxy PowerGadzoox NteworksFujitsuFreescaleFOXCONNFlextronics (formerly Orbit)Feiya TechnologyFDK CorporationFast-ChipFairchildExtreme Packet DevicesExelExcess BandwidthExbit Technology A/SExarEurotechniqueEuropean Silicon Str.ESS TechnologyeSiliconEricsson ComponentsEpigramEon Silicon DevicesEnikia IncorporatedEnhance 3000 IncElpidaElement 14ElektrobitElan Circuit TechEIV(Switzerland)DynamemDynachipDSP GroupDomosysDoDDigital MicrowaveDialogDelkin DevicesDECDATARAMDane-ElecDallas SemiconductorCypressCrystal SemiconductorCrosspoint SolutionsCray ResearchCPU DesignC-Port CorporationCorsairCorollary IncConvex ComputerConexantCom-TierCompaqClearpointClear LogicCKD Corporation Ltd.Cisco Systems, Inc.Cirrus LogicCimaron CommunicationsChrysalis ITSChip2Chip IncorporatedChip ExpressChicory SystemsChiaroChameleon SystemsCenturyCentillium CommunicationsCentaur TechnologyCelesticaCatalystCaspian NetworksCapital Instruments, Inc.CannonCamintonn CorporationCabletronBrooktreeBroadcomBright MicroBRECISBF Goodrich Data.Bestlink SystemsBenchmark Elect.Bay NetworksAVED MemoryAtmelAster ElectronicsAsparixArtesyn TechnologiesArray MicrosystemsArdent TechnologiesAPWApple ComputerAplus Flash TechnologyApacer TechnologyAnalog DevicesAnadigmAMS(Austria Micro)AMIC TechnologyAMIAmerican Computer & Digital Components IncAMCCAlteraALPHA TechnologiesAllied-SignalAlliance SemiconductorAllayer TechnologiesAlchemy SemiconductorAlcatel MietecAKM CompanyAica KogyoAgilent TechnologiesAgate SemiconductorAENEONAdvantage MemoryAdvanced Hardware Arch.Advanced FibreADTEC CorporationAdobe SystemsADMtek IncorporatedAdmor MemoryAdhoc TechnologiesAdaptec IncActrans System IncACTELAcorn ComputersAccelerant NetworksAcbel Polytech IncAANetcom Incorporated3ParData3COMtag:yaml.org,2002:strtag:yaml.org,2002:seqtag:yaml.org,2002:mapduplicate %TAG directiveexpected nothing after STREAM-ENDexpected STREAM-START!!!tag:yaml.org,2002:...%YAML1.1%TAG---expected DOCUMENT-START or STREAM-ENDexpected DOCUMENT-END[,]{}?:-expected SCALAR, SEQUENCE-START, MAPPING-START, or ALIASneither tag nor implicit flags are specified*&!<>incompatible %YAML directivetag handle must not be emptytag handle must start with '!'tag handle must end with '!'tag handle must contain alphanumerical characters onlytag prefix must not be emptyalias value must not be emptyanchor value must not be emptyalias value must contain alphanumerical characters onlyanchor value must contain alphanumerical characters onlytag value must not be empty'"+|second occurencefound duplicate anchor; first occurencefound undefined aliaswrite errordid not find expected did not find expected found undefined tag handlewhile parsing a nodedid not find expected node contentwhile parsing a block nodewhile parsing a flow nodedid not find expected '-' indicatorwhile parsing a block collectiondid not find expected keywhile parsing a block mappingdid not find expected ',' or ']'while parsing a flow sequencedid not find expected ',' or '}'while parsing a flow mappingfound duplicate %YAML directivefound incompatible YAML documentfound duplicate %TAG directivefound character that cannot start any tokenwhile scanning for the next tokencould not find expected ':'while scanning a simple keyblock sequence entries are not allowed in this contextmapping keys are not allowed in this contextmapping values are not allowed in this contextYAMLTAGfound uknown directive namewhile scanning a directivedid not find expected comment or line breakcould not find expected directive namefound unexpected non-alphabetical characterdid not find expected digit or '.' characterwhile scanning a %YAML directivefound extremely long version numberdid not find expected version numberdid not find expected whitespacewhile scanning a %TAG directivedid not find expected whitespace or line breakdid not find expected alphabetic or numeric characterwhile scanning an anchorwhile scanning an aliasdid not find the expected '>'while scanning a tagdid not find expected '!'while scanning a tag directivewhile parsing a tag directivedid not find expected tag URIwhile parsing a %TAG directivewhile parsing a tagdid not find URI escaped octetfound an incorrect leading UTF-8 octetfound an incorrect trailing UTF-8 octetfound an intendation indicator equal to 0while scanning a block scalarfound a tab character where an intendation space is expectedfound unexpected document indicatorwhile scanning a quoted scalarfound unexpected end of streamfound unknown escape characterwhile parsing a quoted scalardid not find expected hexdecimal numberfound invalid Unicode character escape codefound unexpected ':'while scanning a plain scalarfound a tab character that violate intendationinput errorinvalid leading UTF-8 octetincomplete UTF-8 octet sequenceinvalid trailing UTF-8 octetinvalid length of a UTF-8 sequenceinvalid Unicode characterincomplete UTF-16 characterunexpected low surrogate areaincomplete UTF-16 surrogate pairexpected low surrogate areacontrol characters are not allowedIDATIENDPLTEtRNS egDecompressIcnsRLE: still need %d bytes of pixel data  @ @H( H(H(LJ`HBXH AaHBaLkaH 3L 3aH4aA@HaLOaH 3@HaL:aH {3@H`L`H 3@H`L`H !3H(H@@USVWATAUAVAWH$HH H`E3HMHP@Ll$`Ll$XHRHEEH X`3HA@HP LE`L zMS@LzIBHIHcPARLuzIPw LkMu HxkPH_3L@@IAP@H_E3E333H_H _L^HH ^D{L5GsHHI&H f^HI HC^IIHHtBIEGHIfD9+tIIfD9)uH;sfHII;TAD9l$`8L9-\%HD$XLcL9J DHHL$ IISH\L\$XHHK9 u H H]K LEHHH=\H]Dx;u {b<u R8JC:G>;A:HCK)DK(HD$8HCLHD$0CD$(L$ IISHGO)DO(HD$8HGHD$0GLD$(L$ IκIRD_(D8[(uG)8C)u GA+9CtCHGHH RHL$XJ q#HHuH uRHLH[MHLl$ PHyH FRHZH ַ1RHSLLHIIR;t$`AH[HL$XPHH QLƷHϷL\$(L ۷LHIHD$ `IQH ]QH isܭLtHtL\$@HD$8H9tHD$0HsL csHD$(HsLHIHD$ I'QH QLDuL uLHIL\$ IPH Pu8H PHtLGLHIeIPH mPHAZLZH K3@H ZLZHHZIH3H ~ZH '@H rZHIHH dZ*, -3,LYIS@HR0 XLEAqHcHHyYHP@sHR0-@LcL sLHIL\$ HIOLsHftH ޝLssL LtLmHIL\$ I=OLFsL;H WLBظH9tLBLsOHHsL-bH2lHXL-WHL-WHgCHɈN!D-WH# + H H HH+uH ޶D-TWL-rL-kL-rD-OWH L-WL-WD-WL-|WfD-|sfD-4s/NH 8D˺AHVHuLbHIIMAH=MoL%bIH ԹAA$HXHEAfG臧HHu'L H jD˺@H jxMAMHH8H cA;|H iED@y.fD-nfnHUHu$LϵH xjH gjMAPAIH_L-Et$AEEAfH˸f{H3H3蒦HCHu6LzH iDϺJH iL@LcHC HHHK HHHHPHKAHCHCIMITH8OM澀H ӔEDƺd E3L5qmH]iH_HuLHHKH 1ELƺ 补HrTHuLִHH_HKH ԾELƺdH=THuLHH"H^KL9-Tt $D8-TtI^3H; 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